PH1P100&PH1A100

芯片对比: PH1P100SBG676 VS PH1A100SFG676 2023-06-06

IO BANK 0, 24

PH1P100SBG676     PH1A100SFG676 2023-06-06      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
W9 0 M2_0 W9 24 IO_BM2N_24,M2 -
Y9 0 M1_0 Y9 24 IO_BM3P_24,M1 -
AB7 0 M0_0 AB7 24 IO_BM3N_24,M0 -
H10 0 TDI_0 H10 24 IO_BM7_24,TDI -
H11 0 TMS_0 H11 24 IO_BM5N_24,TMS -
H12 0 TCK_0 H12 24 IO_BM6P_24,TCK -
H13 0 IO_C0_0,CCLK H13 24 IO_BM6N_24,CCLK -
J10 0 TDO_0 J10 24 IO_BM5P_24,TDO -
V11 0 INITN_0 V11 24 IO_BM4_24,INITN -
W10 0 DONE_0 W10 24 IO_BM2P_24,DONE -
W11 0 VCCIO_0 W11 24 VCCIO_24 PH1P100支持范围为1.14-3.465V,PH1A100支持范围为1.425-3.465V,即PH1A100不支持LVCMOS12电平标准
Y14 0 VCCIO_0 Y14 24 VCCIO_24 -
AB15 0 TRSTN_0 AB15 24 IO_BM1_24,TRSTN -
AE16 0 PROGRAM_N_0 AE16 24 IO_BM0_24,PROGRAMN PH1P100为配置IO,不可复用为普通IO(CCLK可作为普通IO);PH1A100可复用为普通IO

IO BANK 11

PH1P100SBG676     PH1A100SFG676 2023-06-06      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
T14 11 IO_L20P_11,T3 T14 11 IO_L20P_11 -
T15 11 IO_L20N_11,T3 T15 11 IO_L20N_11 -
T16 11 VCCIO_11 T16 11 VCCIO_11 -
T17 11 IO_L21P_11,T3_DQS_P T17 11 IO_L21P_11 -
T18 11 IO_L21N_11,T3_DQS_N T18 11 IO_L21N_11 PH1P100支持DDR功能,PH1A100不支持
T19 11 IO_L17P_11,T2 T19 11 IO_L17P_11 -
T20 11 IO_L15P_11,T2_DQS_P T20 11 IO_L15P_11 -
T26 11 VCCIO_11 T26 11 VCCIO_11 -
U14 11 IO_L23P_11,T3 U14 11 IO_L23P_11 -
U15 11 IO_L22P_11,T3 U15 11 IO_L22P_11 -
U16 11 IO_L22N_11,T3 U16 11 IO_L22N_11 -
U17 11 IO_L25_11 U17 11 IO_L25_11 -
U19 11 IO_L17N_11,T2 U19 11 IO_L17N_11 -
U20 11 IO_L15N_11,T2_DQS_N U20 11 IO_L15N_11 PH1P100支持DDR功能,PH1A100不支持
U21 11 IO_L13P_11,GCLKIOT1,T2 U21 11 IO_L13P_11,GCLKIOT1 -
U22 11 IO_L12P_11,GCLKIOT2,T1 U22 11 IO_L12P_11,GCLKIOT2 -
U23 11 VCCIO_11 U23 11 VCCIO_11 -
U24 11 IO_L0_11 U24 11 IO_L0_11 -
U25 11 IO_L1P_11,T0 U25 11 IO_L1P_11 -
U26 11 IO_L1N_11,T0 U26 11 IO_L1N_11 -
V14 11 IO_L23N_11,T3 V14 11 IO_L23N_11 -
V16 11 IO_L24P_11,T3 V16 11 IO_L24P_11 -
V17 11 IO_L24N_11,T3 V17 11 IO_L24N_11 -
V18 11 IO_L19P_11,T3 V18 11 IO_L19P_11 -
V19 11 IO_L18P_11,T2 V19 11 IO_L18P_11 -
V20 11 VCCIO_11 V20 11 VCCIO_11 -
V21 11 IO_L13N_11,GCLKIOC1,T2 V21 11 IO_L13N_11,GCLKIOC1 -
V22 11 IO_L12N_11,GCLKIOC2,T1 V22 11 IO_L12N_11,GCLKIOC2 -
V23 11 IO_L10P_11,T1 V23 11 IO_L10P_11 -
V24 11 IO_L6P_11,T0 V24 11 IO_L6P_11 -
V26 11 IO_L2P_11,T0 V26 11 IO_L2P_11 -
W18 11 IO_L19N_11,T3_VREF,T3 W18 11 IO_L19N_11 PH1P100支持外部VREF输入,PH1A100不支持
W19 11 IO_L18N_11,T2 W19 11 IO_L18N_11 -
W20 11 IO_L16P_11,T2 W20 11 IO_L16P_11 -
W21 11 IO_L14P_11,GCLKIOT0,T2 W21 11 IO_L14P_11,GCLKIOT0 -
W23 11 IO_L10N_11,T1 W23 11 IO_L10N_11 -
W24 11 IO_L6N_11,T0_VREF,T0 W24 11 IO_L6N_11 PH1P100支持外部VREF输入,PH1A100不支持
W25 11 IO_L4P_11,T0 W25 11 IO_L4P_11 -
W26 11 IO_L2N_11,T0 W26 11 IO_L2N_11 -
Y20 11 IO_L16N_11,T2 Y20 11 IO_L16N_11 -
Y21 11 IO_L14N_11,GCLKIOC0,T2 Y21 11 IO_L14N_11,GCLKIOC0 -
Y22 11 IO_L11P_11,GCLKIOT3,T1 Y22 11 IO_L11P_11,GCLKIOT3 -
Y23 11 IO_L11N_11,GCLKIOC3,T1 Y23 11 IO_L11N_11,GCLKIOC3 -
Y24 11 VCCIO_11 Y24 11 VCCIO_11 -
Y25 11 IO_L5P_11,T0 Y25 11 IO_L5P_11 -
Y26 11 IO_L4N_11,T0 Y26 11 IO_L4N_11 -
AA22 11 IO_L8P_11,T1 AA22 11 IO_L8P_11 -
AA23 11 IO_L8N_11,T1 AA23 11 IO_L8N_11 -
AA24 11 IO_L7P_11,T1 AA24 11 IO_L7P_11 -
AA25 11 IO_L5N_11,T0 AA25 11 IO_L5N_11 -
AB24 11 IO_L9P_11,T1_DQS_P AB24 11 IO_L9P_11 -
AB25 11 IO_L7N_11,T1 AB25 11 IO_L7N_11 -
AB26 11 IO_L3P_11,T0_DQS_P AB26 11 IO_L3P_11 -
AC24 11 IO_L9N_11,T1_DQS_N AC24 11 IO_L9N_11 PH1P100支持DDR功能,PH1A100不支持
AC25 11 VCCIO_11 AC25 11 VCCIO_11 PH1P100支持范围为1.14-3.465V,PH1A100支持范围为1.425-3.465V,即PH1A100不支持LVCMOS12电平标准
AC26 11 IO_L3N_11,T0_DQS_N AC26 11 IO_L3N_11 PH1P100支持DDR功能,PH1A100不支持

IO BANK 12

PH1P100SBG676     PH1A100SFG676 2023-06-06      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
K24 12 VCCIO_12 K24 12 VCCIO_12 PH1P100支持范围为1.14-3.465V,PH1A100支持范围为1.425-3.465V,即PH1A100不支持LVCMOS12电平标准
K25 12 IO_L7P_12,D9,T1 K25 12 IO_L7P_12,D9 -
K26 12 IO_L7N_12,D10,T1 K26 12 IO_L7N_12,D10 -
L20 12 IO_L8N_12,D12,T1 L20 12 IO_L8N_12,D12 -
L21 12 VCCIO_12 L21 12 VCCIO_12 -
L22 12 IO_L11P_12,GCLKIOT3,T1 L22 12 IO_L11P_12,GCLKIOT3 -
L23 12 IO_L11N_12,GCLKIOC3,T1 L23 12 IO_L11N_12,GCLKIOC3 -
L24 12 IO_L9P_12,T1_DQS_P L24 12 IO_L9P_12 -
L25 12 IO_L9N_12,D13,T1_DQS_N L25 12 IO_L9N_12,D13 PH1P100支持DDR功能,PH1A100不支持
M19 12 IO_L0_12 M19 12 IO_L0_12 -
M20 12 IO_L8P_12,D11,T1 M20 12 IO_L8P_12,D11 -
M21 12 IO_L12P_12,GCLKIOT2,T1 M21 12 IO_L12P_12,GCLKIOT2 -
M22 12 IO_L12N_12,GCLKIOC2,T1 M22 12 IO_L12N_12,GCLKIOC2 -
M24 12 IO_L10P_12,D14,T1 M24 12 IO_L10P_12,D14 -
M25 12 IO_L10N_12,D15,T1 M25 12 IO_L10N_12,D15 -
M26 12 IO_L20N_12,D23,T3 M26 12 IO_L20N_12,D23 -
N14 12 IO_L2N_12,D3,HOLDN,T0 N14 12 IO_L2N_12,D3,HOLDN -
N15 12 VCCIO_12 N15 12 VCCIO_12 -
N16 12 IO_L4P_12,D4,T0 N16 12 IO_L4P_12,D4 -
N17 12 IO_L4N_12,D5,T0 N17 12 IO_L4N_12,D5 -
N18 12 IO_L6N_12,D8,T0_VREF,T0 N18 12 IO_L6N_12,D8 PH1P100支持外部VREF输入,PH1A100不支持
N19 12 IO_L16N_12,D31,T2 N19 12 IO_L16N_12,D31 -
N21 12 IO_L13P_12,GCLKIOT1,T2 N21 12 IO_L13P_12,GCLKIOT1 -
N22 12 IO_L13N_12,GCLKIOC1,T2 N22 12 IO_L13N_12,GCLKIOC1 -
N23 12 IO_L15P_12,RDWRN,T2_DQS_P N23 12 IO_L15P_12,RDWRN -
N24 12 IO_L15N_12,DOUT,CSON,T2_DQS_N N24 12 IO_L15N_12,DOUT,CSON PH1P100支持DDR功能,PH1A100不支持
N25 12 VCCIO_12 N25 12 VCCIO_12 -
N26 12 IO_L20P_12,D24,T3 N26 12 IO_L20P_12,D24 -
P14 12 IO_L2P_12,D2,WPN,T0 P14 12 IO_L2P_12,D2,WPN -
P15 12 IO_L3P_12,HSWAPEN,T0_DQS_P P15 12 IO_L3P_12,HSWAPEN -
P16 12 IO_L3N_12,USRCLK,T0_DQS_N P16 12 IO_L3N_12,USRCLK PH1P100和PH1A100 USRCLK引脚均为测试时钟脚,可当作普通IO使用
PH1P100支持DDR功能,PH1A100不支持            
P18 12 IO_L6P_12,SPICSN,BUSY,T0 P18 12 IO_L6P_12,SPICSN,BUSY -
P19 12 IO_L16P_12,CSN,T2 P19 12 IO_L16P_12,CSN -
P20 12 IO_L14P_12,GCLKIOT0,T2 P20 12 IO_L14P_12,GCLKIOT0 -
P21 12 IO_L14N_12,GCLKIOC0,T2 P21 12 IO_L14N_12,GCLKIOC0 -
P22 12 VCCIO_12 P22 12 VCCIO_12 -
P23 12 IO_L17P_12,D30,T2 P23 12 IO_L17P_12,D30 -
P24 12 IO_L17N_12,D29,T2 P24 12 IO_L17N_12,D29 -
P25 12 IO_L19N_12,D25,T3_VREF,T3 P25 12 IO_L19N_12,D25 PH1P100支持外部VREF输入,PH1A100不支持
P26 12 IO_L22N_12,D20,T3 P26 12 IO_L22N_12,D20 -
R14 12 IO_L1P_12,D0,MOSI,T0 R14 12 IO_L1P_12,D0,MOSI -
R15 12 IO_L1N_12,D1,DIN,MISO,T0 R15 12 IO_L1N_12,D1,DIN,MISO -
R16 12 IO_L5P_12,D6,T0 R16 12 IO_L5P_12,D6 -
R17 12 IO_L5N_12,D7,T0 R17 12 IO_L5N_12,D7 -
R18 12 IO_L25_12 R18 12 IO_L25_12 -
R19 12 VCCIO_12 R19 12 VCCIO_12 -
R20 12 IO_L18P_12,D28,T2 R20 12 IO_L18P_12,D28 -
R21 12 IO_L18N_12,D27,T2 R21 12 IO_L18N_12,D27 -
R22 12 IO_L23N_12,D18,T3 R22 12 IO_L23N_12,D18 -
R23 12 IO_L24N_12,D16,T3 R23 12 IO_L24N_12,D16 -
R25 12 IO_L19P_12,D26,T3 R25 12 IO_L19P_12,D26 -
R26 12 IO_L22P_12,D21,T3 R26 12 IO_L22P_12,D21 -
T22 12 IO_L23P_12,D19,T3 T22 12 IO_L23P_12,D19 -
T23 12 IO_L24P_12,D17,T3 T23 12 IO_L24P_12,D17 -
T24 12 IO_L21P_12,T3_DQS_P T24 12 IO_L21P_12 -
T25 12 IO_L21N_12,D22,T3_DQS_N T25 12 IO_L21N_12,D22 PH1P100支持DDR功能,PH1A100不支持

IO BANK 13

PH1P100SBG676     PH1A100SFG676 2023-06-06      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
D25 13 IO_L20N_13,T3 D25 13 IO_L20N_13 -
D26 13 IO_L21N_13,T3_DQS_N D26 13 IO_L21N_13 PH1P100支持DDR功能,PH1A100不支持
E23 13 IO_L17N_13,T2 E23 13 IO_L17N_13 -
E25 13 IO_L20P_13,T3 E25 13 IO_L20P_13 -
E26 13 IO_L21P_13,T3_DQS_P E26 13 IO_L21P_13 -
F22 13 IO_L15N_13,T2_DQS_N F22 13 IO_L15N_13 PH1P100支持DDR功能,PH1A100不支持
F23 13 IO_L17P_13,T2 F23 13 IO_L17P_13 -
F24 13 IO_L19N_13,T3_VREF,T3 F24 13 IO_L19N_13 PH1P100支持外部VREF输入,PH1A100不支持
F25 13 IO_L23N_13,T3 F25 13 IO_L23N_13 -
F26 13 VCCIO_13 F26 13 VCCIO_13 PH1P100支持范围为1.14-3.465V,PH1A100支持范围为1.425-3.465V,即PH1A100不支持LVCMOS12电平标准
G20 13 IO_L11P_13,GCLKIOT3,T1 G20 13 IO_L11P_13,GCLKIOT3 -
G21 13 IO_L11N_13,GCLKIOC3,T1 G21 13 IO_L11N_13,GCLKIOC3 -
G22 13 IO_L15P_13,T2_DQS_P G22 13 IO_L15P_13 -
G23 13 VCCIO_13 G23 13 VCCIO_13 -
G24 13 IO_L19P_13,T3 G24 13 IO_L19P_13 -
G25 13 IO_L23P_13,T3 G25 13 IO_L23P_13 -
G26 13 IO_L22N_13,T3 G26 13 IO_L22N_13 -
H18 13 IO_L10N_13,T1 H18 13 IO_L10N_13 -
H19 13 IO_L7N_13,T1 H19 13 IO_L7N_13 -
H20 13 VCCIO_13 H20 13 VCCIO_13 -
H21 13 IO_L13P_13,GCLKIOT1,T2 H21 13 IO_L13P_13,GCLKIOT1 -
H22 13 IO_L13N_13,GCLKIOC1,T2 H22 13 IO_L13N_13,GCLKIOC1 -
H23 13 IO_L14N_13,GCLKIOC0,T2 H23 13 IO_L14N_13,GCLKIOC0 -
H24 13 IO_L16N_13,T2 H24 13 IO_L16N_13 -
H26 13 IO_L22P_13,T3 H26 13 IO_L22P_13 -
J14 13 IO_L2P_13,T0 J14 13 IO_L2P_13 -
J15 13 IO_L2N_13,T0 J15 13 IO_L2N_13 -
J16 13 IO_L1N_13,T0 J16 13 IO_L1N_13 -
J17 13 VCCIO_13 J17 13 VCCIO_13 -
J18 13 IO_L10P_13,T1 J18 13 IO_L10P_13 -
J19 13 IO_L7P_13,T1 J19 13 IO_L7P_13 -
J20 13 IO_L9N_13,T1_DQS_N J20 13 IO_L9N_13 PH1P100支持DDR功能,PH1A100不支持
J21 13 IO_L12N_13,GCLKIOC2,T1 J21 13 IO_L12N_13,GCLKIOC2 -
J23 13 IO_L14P_13,GCLKIOT0,T2 J23 13 IO_L14P_13,GCLKIOT0 -
J24 13 IO_L16P_13,T2 J24 13 IO_L16P_13 -
J25 13 IO_L24P_13,T3 J25 13 IO_L24P_13 -
J26 13 IO_L24N_13,T3 J26 13 IO_L24N_13 -
K14 13 VCCIO_13 K14 13 VCCIO_13 -
K15 13 IO_L1P_13,T0 K15 13 IO_L1P_13 -
K16 13 IO_L3P_13,T0_DQS_P K16 13 IO_L3P_13 -
K17 13 IO_L3N_13,T0_DQS_N K17 13 IO_L3N_13 PH1P100支持DDR功能,PH1A100不支持
K18 13 IO_L0_13 K18 13 IO_L0_13 -
K20 13 IO_L9P_13,T1_DQS_P K20 13 IO_L9P_13 -
K21 13 IO_L12P_13,GCLKIOT2,T1 K21 13 IO_L12P_13,GCLKIOT2 -
K22 13 IO_L18P_13,T2 K22 13 IO_L18P_13 -
K23 13 IO_L18N_13,T2 K23 13 IO_L18N_13 -
L14 13 IO_L4N_13,T0 L14 13 IO_L4N_13 -
L15 13 IO_L5N_13,T0 L15 13 IO_L5N_13 -
L17 13 IO_L8P_13,T1 L17 13 IO_L8P_13 -
L18 13 IO_L8N_13,T1 L18 13 IO_L8N_13 -
L19 13 IO_L25_13 L19 13 IO_L25_13 -
M14 13 IO_L4P_13,T0 M14 13 IO_L4P_13 -
M15 13 IO_L5P_13,T0 M15 13 IO_L5P_13 -
M16 13 IO_L6P_13,T0 M16 13 IO_L6P_13 -
M17 13 IO_L6N_13,T0_VREF,T0 M17 13 IO_L6N_13 PH1P100支持外部VREF输入,PH1A100不支持
M18 13 VCCIO_13 M18 13 VCCIO_13 -

IO BANK 14

PH1P100SBG676     PH1A100SFG676 2023-06-06      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
A17 14 IO_L9P_14,T1_DQS_P A17 14 IO_L9P_14 -
A18 14 IO_L9N_14,T1_DQS_N A18 14 IO_L9N_14 PH1P100支持DDR功能,PH1A100不支持
A19 14 IO_L10N_14,T1 A19 14 IO_L10N_14 -
A20 14 IO_L15N_14,T2_DQS_N A20 14 IO_L15N_14 PH1P100支持DDR功能,PH1A100不支持
A21 14 VCCIO_14 A21 14 VCCIO_14 PH1P100支持范围为1.14-3.465V,PH1A100支持范围为1.425-3.465V,即PH1A100不支持LVCMOS12电平标准
A22 14 IO_L17N_14,T2 A22 14 IO_L17N_14 -
A23 14 IO_L21P_14,T3_DQS_P A23 14 IO_L21P_14 -
A24 14 IO_L21N_14,T3_DQS_N A24 14 IO_L21N_14 PH1P100支持DDR功能,PH1A100不支持
A25 14 IO_L20N_14,T3 A25 14 IO_L20N_14 -
B17 14 IO_L7N_14,T1 B17 14 IO_L7N_14 -
B18 14 VCCIO_14 B18 14 VCCIO_14 -
B19 14 IO_L10P_14,T1 B19 14 IO_L10P_14 -
B20 14 IO_L15P_14,T2_DQS_P B20 14 IO_L15P_14 -
B21 14 IO_L16N_14,T2 B21 14 IO_L16N_14 -
B22 14 IO_L17P_14,T2 B22 14 IO_L17P_14 -
B24 14 IO_L23N_14,T3 B24 14 IO_L23N_14 -
B25 14 IO_L20P_14,T3 B25 14 IO_L20P_14 -
B26 14 IO_L22N_14,T3 B26 14 IO_L22N_14 -
C17 14 IO_L7P_14,T1 C17 14 IO_L7P_14 -
C18 14 IO_L12N_14,GCLKIOC2,T1 C18 14 IO_L12N_14,GCLKIOC2 -
C19 14 IO_L13N_14,GCLKIOC1,T2 C19 14 IO_L13N_14,GCLKIOC1 -
C21 14 IO_L16P_14,T2 C21 14 IO_L16P_14 -
C22 14 IO_L19P_14,T3 C22 14 IO_L19P_14 -
C23 14 IO_L19N_14,T3_VREF,T3 C23 14 IO_L19N_14 PH1P100支持外部VREF输入,PH1A100不支持
C24 14 IO_L23P_14,T3 C24 14 IO_L23P_14 -
C25 14 VCCIO_14 C25 14 VCCIO_14 -
C26 14 IO_L22P_14,T3 C26 14 IO_L22P_14 -
D16 14 IO_L8N_14,T1 D16 14 IO_L8N_14 -
D18 14 IO_L12P_14,GCLKIOT2,T1 D18 14 IO_L12P_14,GCLKIOT2 -
D19 14 IO_L13P_14,GCLKIOT1,T2 D19 14 IO_L13P_14,GCLKIOT1 -
D20 14 IO_L14N_14,GCLKIOC0,T2 D20 14 IO_L14N_14,GCLKIOC0 -
D21 14 IO_L18N_14,T2 D21 14 IO_L18N_14 -
D22 14 VCCIO_14 D22 14 VCCIO_14 -
D23 14 IO_L24P_14,T3 D23 14 IO_L24P_14 -
D24 14 IO_L24N_14,T3 D24 14 IO_L24N_14 -
E16 14 IO_L8P_14,T1 E16 14 IO_L8P_14 -
E17 14 IO_L11P_14,GCLKIOT3,T1 E17 14 IO_L11P_14,GCLKIOT3 -
E18 14 IO_L11N_14,GCLKIOC3,T1 E18 14 IO_L11N_14,GCLKIOC3 -
E19 14 VCCIO_14 E19 14 VCCIO_14 -
E20 14 IO_L14P_14,GCLKIOT0,T2 E20 14 IO_L14P_14,GCLKIOT0 -
E21 14 IO_L18P_14,T2 E21 14 IO_L18P_14 -
E22 14 IO_L25_14 E22 14 IO_L25_14 -
F15 14 IO_L4N_14,T0 F15 14 IO_L4N_14 -
F16 14 VCCIO_14 F16 14 VCCIO_14 -
F17 14 IO_L2N_14,T0 F17 14 IO_L2N_14 -
F18 14 IO_L3P_14,T0_DQS_P F18 14 IO_L3P_14 -
F19 14 IO_L3N_14,T0_DQS_N F19 14 IO_L3N_14 PH1P100支持DDR功能,PH1A100不支持
F20 14 IO_L5N_14,T0 F20 14 IO_L5N_14 -
G15 14 IO_L4P_14,T0 G15 14 IO_L4P_14 -
G16 14 IO_L6N_14,T0_VREF,T0 G16 14 IO_L6N_14 PH1P100支持外部VREF输入,PH1A100不支持
G17 14 IO_L2P_14,T0 G17 14 IO_L2P_14 -
G19 14 IO_L5P_14,T0 G19 14 IO_L5P_14 -
H14 14 IO_L1P_14,T0 H14 14 IO_L1P_14 -
H15 14 IO_L1N_14,T0 H15 14 IO_L1N_14 -
H16 14 IO_L6P_14,T0 H16 14 IO_L6P_14 -
H17 14 IO_L0_14 H17 14 IO_L0_14 -

IO BANK 21

PH1P100SBG676     PH1A100SFG676 2023-06-06      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
W17 21 VCCIO_21 W17 21 VCCIO_21 -
AA17 21 NC AA17 21 IO_BM5P_21 -
AA21 21 VCCIO_21 AA21 21 VCCIO_21 PH1P100支持范围为1.14-3.465V,PH1A100支持范围为1.425-3.465V,即PH1A100不支持LVCMOS12电平标准;PH1P100可不供电,PH1A100必须供电
AB16 21 NC AB16 21 IO_BM1P_21 -
AB17 21 NC AB17 21 IO_BM5N_21 -
AB18 21 VCCIO_21 AB18 21 VCCIO_21 -
AC16 21 NC AC16 21 IO_BM1N_21 PH1P100为NC引脚,PH1A100为HRB IO引脚
AC17 21 NC AC17 21 IO_BM2P_21 -
AC18 21 NC AC18 21 IO_BM4N_21 -
AD17 21 NC AD17 21 IO_BM2N_21 -
AD18 21 NC AD18 21 IO_BM4P_21 -
AD22 21 VCCIO_21 AD22 21 VCCIO_21 -
AE17 21 NC AE17 21 IO_BM6P_21 -
AE18 21 NC AE18 21 IO_BM3N_21 -
AE19 21 VCCIO_21 AE19 21 VCCIO_21 -
AF17 21 NC AF17 21 IO_BM6N_21 -
AF18 21 NC AF18 21 IO_BM3P_21 -
AF26 21 VCCIO_21 AF26 21 VCCIO_21 -

IO BANK 22

PH1P100SBG676     PH1A100SFG676 2023-06-06      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
U3 22 VCCIO_22 U3 22 VCCIO_22 -
W7 22 VCCIO_22 W7 22 VCCIO_22 -
Y4 22 VCCIO_22 Y4 22 VCCIO_22 -
AA1 22 VCCIO_22 AA1 22 VCCIO_22 -
AC5 22 VCCIO_22 AC5 22 VCCIO_22 -
AD2 22 VCCIO_22 AD2 22 VCCIO_22 -

IO BANK 32

PH1P100SBG676     PH1A100SFG676 2023-06-06      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
H1 32 IO_R10N_32,T1 H1 32 IO_R10N_32 -
H2 32 IO_R10P_32,T1 H2 32 IO_R10P_32 -
J1 32 IO_R7N_32,T1 J1 32 IO_R7N_32 -
J3 32 IO_R1N_32,T0 J3 32 IO_R1N_32 -
K1 32 IO_R7P_32,T1 K1 32 IO_R7P_32 -
K2 32 IO_R8N_32,T1 K2 32 IO_R8N_32 -
K3 32 IO_R1P_32,T0 K3 32 IO_R1P_32 -
K4 32 VCCIO_32 K4 32 VCCIO_32 PH1P100支持范围为1.14-3.465V,PH1A100支持范围为1.425-3.465V,即PH1A100不支持LVCMOS12电平标准
K5 32 IO_R4N_32,T0 K5 32 IO_R4N_32 -
L1 32 VCCIO_32 L1 32 VCCIO_32 -
L2 32 IO_R11N_32,GCLKIOC3,T1 L2 32 IO_R11N_32,GCLKIOC3 -
L3 32 IO_R8P_32,T1 L3 32 IO_R8P_32 -
L4 32 IO_R3N_32,T0_DQS_N L4 32 IO_R3N_32 PH1P100支持DDR功能,PH1A100不支持
L5 32 IO_R4P_32,T0 L5 32 IO_R4P_32 -
L7 32 IO_R2N_32,T0 L7 32 IO_R2N_32 -
M1 32 IO_R9N_32,T1_DQS_N M1 32 IO_R9N_32 PH1P100支持DDR功能,PH1A100不支持
M2 32 IO_R11P_32,GCLKIOT3,T1 M2 32 IO_R11P_32,GCLKIOT3 -
M4 32 IO_R3P_32,T0_DQS_P M4 32 IO_R3P_32 -
M5 32 IO_R6N_32,T0_VREF,T0 M5 32 IO_R6N_32 PH1P100支持外部VREF输入,PH1A100不支持
M6 32 IO_R6P_32,T0 M6 32 IO_R6P_32 -
M7 32 IO_R2P_32,T0 M7 32 IO_R2P_32 -
M8 32 VCCIO_32 M8 32 VCCIO_32 -
N1 32 IO_R9P_32,T1_DQS_P N1 32 IO_R9P_32 -
N2 32 IO_R12N_32,GCLKIOC2,T1 N2 32 IO_R12N_32,GCLKIOC2 -
N3 32 IO_R12P_32,GCLKIOT2,T1 N3 32 IO_R12P_32,GCLKIOT2 -
N4 32 IO_R14N_32,GCLKIOC0,T2 N4 32 IO_R14N_32,GCLKIOC0 -
N5 32 VCCIO_32 N5 32 VCCIO_32 -
N6 32 IO_R5N_32,T0 N6 32 IO_R5N_32 -
N7 32 IO_R5P_32,T0 N7 32 IO_R5P_32 -
N8 32 IO_R0_32 N8 32 IO_R0_32 -
P1 32 IO_R15N_32,T2_DQS_N P1 32 IO_R15N_32 PH1P100支持DDR功能,PH1A100不支持
P2 32 VCCIO_32 P2 32 VCCIO_32 -
P3 32 IO_R13N_32,GCLKIOC1,T2 P3 32 IO_R13N_32,GCLKIOC1 -
P4 32 IO_R14P_32,GCLKIOT0,T2 P4 32 IO_R14P_32,GCLKIOT0 -
P5 32 IO_R19N_32,T3_VREF,T3 P5 32 IO_R19N_32 PH1P100支持外部VREF输入,PH1A100不支持
P6 32 IO_R19P_32,T3 P6 32 IO_R19P_32 -
P8 32 IO_R22N_32,T3 P8 32 IO_R22N_32 -
R1 32 IO_R15P_32,T2_DQS_P R1 32 IO_R15P_32 -
R2 32 IO_R17N_32,T2 R2 32 IO_R17N_32 -
R3 32 IO_R13P_32,GCLKIOT1,T2 R3 32 IO_R13P_32,GCLKIOT1 -
R5 32 IO_R20N_32,T3 R5 32 IO_R20N_32 -
R6 32 IO_R23N_32,T3 R6 32 IO_R23N_32 -
R7 32 IO_R23P_32,T3 R7 32 IO_R23P_32 -
R8 32 IO_R22P_32,T3 R8 32 IO_R22P_32 -
T2 32 IO_R17P_32,T2 T2 32 IO_R17P_32 -
T3 32 IO_R16N_32,T2 T3 32 IO_R16N_32 -
T4 32 IO_R16P_32,T2 T4 32 IO_R16P_32 -
T5 32 IO_R20P_32,T3 T5 32 IO_R20P_32 -
T6 32 VCCIO_32 T6 32 VCCIO_32 -
T7 32 IO_R24N_32,T3 T7 32 IO_R24N_32 -
T8 32 IO_R24P_32,T3 T8 32 IO_R24P_32 -
U1 32 IO_R18N_32,T2 U1 32 IO_R18N_32 -
U2 32 IO_R18P_32,T2 U2 32 IO_R18P_32 -
U4 32 IO_R25_32 U4 32 IO_R25_32 -
U5 32 IO_R21N_32,T3_DQS_N U5 32 IO_R21N_32 PH1P100支持DDR功能,PH1A100不支持
U6 32 IO_R21P_32,T3_DQS_P U6 32 IO_R21P_32 -

IO BANK 33

PH1P100SBG676     PH1A100SFG676 2023-06-06      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
A1 33 VCCIO_33 A1 33 VCCIO_33 PH1P100支持范围为1.14-3.465V,PH1A100支持范围为1.425-3.465V,即PH1A100不支持LVCMOS12电平标准
A2 33 IO_R20N_33,T3 A2 33 IO_R20N_33 -
A3 33 IO_R20P_33,T3 A3 33 IO_R20P_33 -
A4 33 IO_R16N_33,T2 A4 33 IO_R16N_33 -
A5 33 IO_R15N_33,T2_DQS_N A5 33 IO_R15N_33 PH1P100支持DDR功能,PH1A100不支持
B1 33 IO_R21N_33,T3_DQS_N B1 33 IO_R21N_33 PH1P100支持DDR功能,PH1A100不支持
B2 33 IO_R19N_33,T3_VREF,T3 B2 33 IO_R19N_33 PH1P100支持外部VREF输入,PH1A100不支持
B4 33 IO_R16P_33,T2 B4 33 IO_R16P_33 -
B5 33 IO_R15P_33,T2_DQS_P B5 33 IO_R15P_33 -
C1 33 IO_R21P_33,T3_DQS_P C1 33 IO_R21P_33 -
C2 33 IO_R19P_33,T3 C2 33 IO_R19P_33 -
C3 33 IO_R17N_33,T2 C3 33 IO_R17N_33 -
C4 33 IO_R14N_33,GCLKIOC0,T2 C4 33 IO_R14N_33,GCLKIOC0 -
C5 33 VCCIO_33 C5 33 VCCIO_33 -
D1 33 IO_R23N_33,T3 D1 33 IO_R23N_33 -
D2 33 VCCIO_33 D2 33 VCCIO_33 -
D3 33 IO_R17P_33,T2 D3 33 IO_R17P_33 -
D4 33 IO_R14P_33,GCLKIOT0,T2 D4 33 IO_R14P_33,GCLKIOT0 -
D5 33 IO_R13N_33,GCLKIOC1,T2 D5 33 IO_R13N_33,GCLKIOC1 -
D6 33 IO_R1N_33,T0 D6 33 IO_R1N_33 -
E1 33 IO_R23P_33,T3 E1 33 IO_R23P_33 -
E2 33 IO_R22N_33,T3 E2 33 IO_R22N_33 -
E3 33 IO_R18N_33,T2 E3 33 IO_R18N_33 -
E5 33 IO_R13P_33,GCLKIOT1,T2 E5 33 IO_R13P_33,GCLKIOT1 -
E6 33 IO_R1P_33,T0 E6 33 IO_R1P_33,GPFOUTEN PH1P100中GPFOUTEN功能不放出
F2 33 IO_R22P_33,T3 F2 33 IO_R22P_33 -
F3 33 IO_R18P_33,T2 F3 33 IO_R18P_33 -
F4 33 IO_R11N_33,GCLKIOC3,T1 F4 33 IO_R11N_33,GCLKIOC3 -
F5 33 IO_R12N_33,GCLKIOC2,T1 F5 33 IO_R12N_33,GCLKIOC2 -
F6 33 VCCIO_33 F6 33 VCCIO_33 -
F7 33 IO_R4N_33,T0 F7 33 IO_R4N_33 -
F8 33 IO_R4P_33,T0 F8 33 IO_R4P_33 -
G1 33 IO_R24N_33,T3 G1 33 IO_R24N_33 -
G2 33 IO_R24P_33,T3 G2 33 IO_R24P_33 -
G3 33 VCCIO_33 G3 33 VCCIO_33 -
G4 33 IO_R11P_33,GCLKIOT3,T1 G4 33 IO_R11P_33,GCLKIOT3 -
G5 33 IO_R12P_33,GCLKIOT2,T1 G5 33 IO_R12P_33,GCLKIOT2 -
G6 33 IO_R5N_33,T0 G6 33 IO_R5N_33 -
G7 33 IO_R3N_33,T0_DQS_N G7 33 IO_R3N_33 PH1P100支持DDR功能,PH1A100不支持
G8 33 IO_R2N_33,T0 G8 33 IO_R2N_33 -
G9 33 IO_R6N_33,T0_VREF,T0 G9 33 IO_R6N_33 PH1P100支持外部VREF输入,PH1A100不支持
H3 33 IO_R25_33 H3 33 IO_R25_33 -
H4 33 IO_R9N_33,T1_DQS_N H4 33 IO_R9N_33 PH1P100支持DDR功能,PH1A100不支持
H6 33 IO_R5P_33,T0 H6 33 IO_R5P_33 -
H7 33 IO_R3P_33,T0_DQS_P H7 33 IO_R3P_33 -
H8 33 IO_R2P_33,T0 H8 33 IO_R2P_33 -
H9 33 IO_R6P_33,T0 H9 33 IO_R6P_33 -
J4 33 IO_R9P_33,T1_DQS_P J4 33 IO_R9P_33 -
J5 33 IO_R7N_33,T1 J5 33 IO_R7N_33 -
J6 33 IO_R7P_33,T1 J6 33 IO_R7P_33 -
J7 33 VCCIO_33 J7 33 VCCIO_33 -
J8 33 IO_R0_33 J8 33 IO_R0_33 -
K6 33 IO_R10N_33,T1 K6 33 IO_R10N_33 -
K7 33 IO_R10P_33,T1 K7 33 IO_R10P_33 -
K8 33 IO_R8N_33,T1 K8 33 IO_R8N_33 -
L8 33 IO_R8P_33,T1 L8 33 IO_R8P_33 -

IO BANK 91, 92

PH1P100SBG676     PH1A100SFG676 2023-06-06      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
V9 91 NC V9 92 RESREF_92 -
AA7 91 RX_CDRCLKN_91 AA7 91 RXRECCLKM_91 -
AA8 91 RX_CDRCLKP_91 AA8 91 RXRECCLKP_91 -
AC8 91 TX1P_91 AC8 91 TXM0_91 SERDES TX通道PAD,PH1P100与PH1A100 PAD的P/N极性相反,Lane顺序也不同
AC9 91 PHYVCCA_91 AC9 91 PHYVCCA_91 -
AD7 91 NC AD7 91 PHYVCCT_91 PH1P100不支持PHYVCCT电压输入,为NC引脚;PH1A100典型值为0.9V
AD8 91 TX1N_91 AD8 91 TXP0_91 -
AE7 91 TX0P_91 AE7 91 TXM1_91 -
AE8 91 NC AE8 91 PHYVCCT_91 -
AE9 91 TX2P_91 AE9 92 TXM1_92 -
AF7 91 TX0N_91 AF7 91 TXP1_91 -
AF9 91 TX2N_91 AF9 92 TXP1_92 -
Y15 91 NC Y15 92 RXRECCLKP_92 -
AA10 91 PHYVCCA_91 AA10 91 PHYVCCA_91 PH1P100和PH1A100典型值为1.8V
AA11 91 REFCLK0P_91 AA11 91 REFCLKP_91 -
AA12 91 PHYVCCA_91 AA12 92 PHYVCCA_92 -
AA13 91 REFCLK1P_91 AA13 92 REFCLKP_92 -
AA15 91 NC AA15 92 RXRECCLKM_92 PH1P100为NC引脚,PH1A100为恢复时钟输出引脚
AB11 91 REFCLK0N_91 AB11 91 REFCLKM_91 -
AB13 91 REFCLK1N_91 AB13 92 REFCLKM_92 -
AC10 91 TX3P_91 AC10 92 TXM0_92 SERDES TX通道PAD,PH1P100与PH1A100的PAD P/N极性相反,Lane顺序也不同
AC11 91 PHYVCCA_91 AC11 92 PHYVCCA_92 -
AC12 91 RX3P_91 AC12 92 RXP0_92 -
AC13 91 PHYVCCA_91 AC13 92 PHYVCCA_92 -
AC14 91 RX1P_91 AC14 91 RXP0_91 -
AD10 91 TX3N_91 AD10 92 TXP0_92 -
AD12 91 RX3N_91 AD12 92 RXM0_92 SERDES RX通道PAD,PH1P100与PH1A100 PAD的P/N极性相同,Lane顺序不同
AD14 91 RX1N_91 AD14 91 RXM0_91 SERDES RX通道PAD,PH1P100与PH1A100 PAD的P/N极性相同,Lane顺序不同
AD15 91 NC AD15 92 PHYVCCT_92 -
AE10 91 NC AE10 91 PHYVCCT_91 -
AE11 91 RX0P_91 AE11 91 RXP1_91 -
AE12 91 NC AE12 92 PHYVCCT_92 -
AE13 91 RX2P_91 AE13 92 RXP1_92 -
AE14 91 NC AE14 92 PHYVCCT_92 -
AF11 91 RX0N_91 AF11 91 RXM1_91 -
AF13 91 RX2N_91 AF13 92 RXM1_92 -
AF15 91 RESREF_91 AF15 91 RESREF_91 PH1P每四个Lane共用一个参考电阻,共需要2个参考电阻;PH1A每两条Lane共用一个参考电阻,共需要4个参考电阻。参考电阻时通过200欧1%精度电阻下拉到地。

IO BANK 93, 94

PH1P100SBG676     PH1A100SFG676 2023-06-06      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
A7 94 TX0N_94 A7 94 TXP0_94 -
A9 94 TX2N_94 A9 93 TXP0_93 -
B7 94 TX0P_94 B7 94 TXM0_94 PH1P100和PH1A100 PCIe专用serdes通道
注意PH1P100与PH1A100的TX PAD P/N极性相反            
B8 94 NC B8 94 PHYVCCT_94 -
B9 94 TX2P_94 B9 93 TXM0_93 SERDES TX通道PAD,PH1P100与PH1A100的PAD P/N极性相反,Lane顺序不同
PH1P100为PCIe专用SERDES通道,PH1A100为SERDES通道            
C7 94 NC C7 94 PHYVCCT_94 -
C8 94 TX1N_94 C8 94 TXP1_94 -
D8 94 TX1P_94 D8 94 TXM1_94 -
D9 94 PHYVCCA_94 D9 94 PHYVCCA_94 -
V8 94 NC V8 94 RESREF_94 -
W8 94 NC W8 93 RXRECCLKP_93 -
Y8 94 NC Y8 93 RXRECCLKM_93 -
A11 94 RX0N_94 A11 94 RXM0_94 PH1P100和PH1A100 PCIe专用serdes通道
注意PH1P100与PH1A100的RX PAD的P/N极性相同            
A13 94 RX2N_94 A13 93 RXM0_93 PH1P100与PH1A100 PAD的P/N极性相同,Lane顺序不同
PH1P100为PCIe专用SERDES通道,PH1A100为SERDES通道            
A15 94 RESREF_94 A15 93 RESREF_93 -
B10 94 NC B10 94 PHYVCCT_94 -
B11 94 RX0P_94 B11 94 RXP0_94 -
B12 94 NC B12 93 PHYVCCT_93 -
B13 94 RX2P_94 B13 93 RXP0_93 -
B14 94 NC B14 93 PHYVCCT_93 -
C10 94 TX3N_94 C10 93 TXP1_93 -
C12 94 RX3N_94 C12 93 RXM1_93 -
C14 94 RX1N_94 C14 94 RXM1_94 -
C15 94 NC C15 93 PHYVCCT_93 -
D10 94 TX3P_94 D10 93 TXM1_93 -
D11 94 PHYVCCA_94 D11 93 PHYVCCA_93 -
D12 94 RX3P_94 D12 93 RXP1_93 -
D13 94 PHYVCCA_94 D13 93 PHYVCCA_93 -
D14 94 RX1P_94 D14 94 RXP1_94 -
E11 94 REFCLK0N_94 E11 94 REFCLKM_94 -
E13 94 REFCLK1N_94 E13 93 REFCLKM_93 -
F10 94 PHYVCCA_94 F10 94 PHYVCCA_94 -
F11 94 REFCLK0P_94 F11 94 REFCLKP_94 -
F12 94 PHYVCCA_94 F12 93 PHYVCCA_93 -
F13 94 REFCLK1P_94 F13 93 REFCLKP_93 -

IO BANK Other

PH1P100SBG676     PH1A100SFG676 2023-06-06      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
A6 - GND A6 - GND -
A8 - GND A8 - GND -
B3 - GND B3 - GND -
B6 - GND B6 - GND -
C6 - GND C6 - GND -
C9 - GND C9 - GND -
D7 - GND D7 - GND -
E4 - GND E4 - GND -
E7 - GND E7 - GND -
E8 - GND E8 - GND -
E9 - GND E9 - GND -
F1 - GND F1 - GND -
F9 - GND F9 - GND -
H5 - GND H5 - GND -
J2 - GND J2 - GND -
J9 - VCCAUX J9 - VCCAUX PH1P100的VCCAUX分为VCCAUX和VCCAUX_IO,应用时必须都供电,典型值为1.8V
K9 - GND K9 - GND -
L6 - GND L6 - GND -
L9 - VCCAUX_IO L9 - VCCAUX -
M3 - GND M3 - GND -
M9 - GND M9 - GND -
N9 - VCCAUX_IO N9 - VCCAUX -
P7 - GND P7 - GND -
P9 - GND P9 - GND -
R4 - GND R4 - GND -
R9 - VCCAUX_IO R9 - VCCAUX -
T1 - GND T1 - GND -
T9 - GND T9 - GND -
U7 - NC U7 - NC -
U8 - GND U8 - GND -
U9 - VCCAUX U9 - VCCAUX -
V1 - NC V1 - NC -
V2 - NC V2 - NC -
V3 - NC V3 - NC -
V4 - NC V4 - NC -
V5 - GND V5 - GND -
V6 - NC V6 - NC -
V7 - NC V7 - NC -
W1 - NC W1 - NC -
W2 - GND W2 - GND -
W3 - NC W3 - NC -
W4 - NC W4 - NC -
W5 - NC W5 - NC -
W6 - NC W6 - NC -
Y1 - NC Y1 - NC -
Y2 - NC Y2 - NC -
Y3 - NC Y3 - NC -
Y5 - NC Y5 - NC -
Y6 - NC Y6 - NC -
Y7 - NC Y7 - NC -
A10 - GND A10 - GND -
A12 - GND A12 - GND -
A14 - GND A14 - GND -
A16 - GND A16 - GND -
A26 - GND A26 - GND -
AA2 - NC AA2 - NC -
AA3 - NC AA3 - NC -
AA4 - NC AA4 - NC -
AA5 - NC AA5 - NC -
AA6 - GND AA6 - GND -
AA9 - GND AA9 - GND -
AB1 - NC AB1 - NC -
AB2 - NC AB2 - NC -
AB3 - GND AB3 - GND -
AB4 - NC AB4 - NC -
AB5 - NC AB5 - NC -
AB6 - NC AB6 - NC -
AB8 - GND AB8 - GND -
AB9 - GND AB9 - GND -
AC1 - NC AC1 - NC -
AC2 - NC AC2 - NC -
AC3 - NC AC3 - NC -
AC4 - NC AC4 - NC -
AC6 - NC AC6 - NC -
AC7 - GND AC7 - GND -
AD1 - NC AD1 - NC -
AD3 - NC AD3 - NC -
AD4 - NC AD4 - NC -
AD5 - NC AD5 - NC -
AD6 - GND AD6 - GND -
AD9 - GND AD9 - GND -
AE1 - NC AE1 - NC -
AE2 - NC AE2 - NC -
AE3 - NC AE3 - NC -
AE4 - GND AE4 - GND -
AE5 - NC AE5 - NC -
AE6 - GND AE6 - GND -
AF1 - GND AF1 - GND -
AF2 - NC AF2 - NC -
AF3 - NC AF3 - NC -
AF4 - NC AF4 - NC -
AF5 - NC AF5 - NC -
AF6 - GND AF6 - GND -
AF8 - GND AF8 - GND -
B15 - GND B15 - GND -
B16 - GND B16 - GND -
B23 - GND B23 - GND -
C11 - GND C11 - GND -
C13 - GND C13 - GND -
C16 - GND C16 - GND -
C20 - GND C20 - GND -
D15 - GND D15 - GND -
D17 - GND D17 - GND -
E10 - GND E10 - GND -
E12 - GND E12 - GND -
E14 - GND E14 - GND -
E15 - GND E15 - GND -
E24 - GND E24 - GND -
F14 - GND F14 - GND -
F21 - GND F21 - GND -
G10 - GND G10 - GND -
G11 - GND G11 - GND -
G12 - GND G12 - GND -
G13 - GND G13 - GND -
G14 - NC G14 - NC -
G18 - GND G18 - GND -
H25 - GND H25 - GND -
J11 - VCCINT J11 - VCCINT PH1P100典型值为0.95V,PH1A100典型值为0.9V
J12 - GND J12 - GND -
J13 - VCCINT J13 - VCCINT -
J22 - GND J22 - GND -
K10 - VCCINT K10 - VCCINT -
K11 - GND K11 - GND -
K12 - VCCINT K12 - VCCINT -
K13 - GND K13 - GND -
K19 - GND K19 - GND -
L10 - GND L10 - GND -
L11 - VCCINT L11 - VCCINT -
L12 - GND L12 - GND -
L13 - VCCINT L13 - VCCINT -
L16 - GND L16 - GND -
L26 - GND L26 - GND -
M10 - VCCINT M10 - VCCINT -
M11 - NC M11 - NC -
M12 - NC M12 - NC -
M13 - GND M13 - GND -
M23 - GND M23 - GND -
N10 - GND N10 - GND -
N11 - NC N11 - NC -
N12 - NC N12 - NC -
N13 - NC N13 - VCCINT PH1P100对应引脚为NC
N20 - GND N20 - GND -
P10 - VCCINT P10 - VCCINT -
P11 - NC P11 - NC -
P12 - NC P12 - NC -
P13 - GND P13 - GND -
P17 - GND P17 - GND -
R10 - GND R10 - GND -
R11 - NC R11 - NC -
R12 - NC R12 - NC -
R13 - NC R13 - VCCINT -
R24 - GND R24 - GND -
T10 - VCCINT T10 - VCCINT -
T11 - GND T11 - GND -
T12 - VCCINT T12 - VCCINT -
T13 - GND T13 - GND -
T21 - GND T21 - GND -
U10 - GND U10 - GND -
U11 - VCCINT U11 - VCCINT -
U12 - GND U12 - GND -
U13 - NC U13 - VCCINT -
U18 - GND U18 - GND -
V10 - VCCINT V10 - VCCINT -
V12 - VCCINT V12 - VCCINT -
V13 - GND V13 - GND -
V15 - GND V15 - GND -
V25 - GND V25 - GND -
W12 - GND W12 - GND -
W13 - NC W13 - VCCINT -
W14 - NC W14 - NC PH1P100两管脚当NC使用时,上拉不能超过VCCAUX
W15 - NC W15 - NC -
W16 - NC W16 - NC -
W22 - GND W22 - GND -
Y10 - GND Y10 - GND -
Y11 - GND Y11 - GND -
Y12 - GND Y12 - GND -
Y13 - GND Y13 - GND -
Y16 - NC Y16 - NC -
Y17 - NC Y17 - NC -
Y18 - NC Y18 - NC -
Y19 - GND Y19 - GND -
AA14 - GND AA14 - GND -
AA16 - GND AA16 - GND -
AA18 - NC AA18 - NC -
AA19 - NC AA19 - NC -
AA20 - NC AA20 - NC -
AA26 - GND AA26 - GND -
AB10 - GND AB10 - GND -
AB12 - GND AB12 - GND -
AB14 - GND AB14 - GND -
AB19 - NC AB19 - NC -
AB20 - NC AB20 - NC -
AB21 - NC AB21 - NC -
AB22 - NC AB22 - NC -
AB23 - GND AB23 - GND -
AC15 - GND AC15 - GND -
AC19 - NC AC19 - NC -
AC20 - GND AC20 - GND -
AC21 - NC AC21 - NC -
AC22 - NC AC22 - NC -
AC23 - NC AC23 - NC -
AD11 - GND AD11 - GND -
AD13 - GND AD13 - GND -
AD16 - GND AD16 - GND -
AD19 - NC AD19 - NC -
AD20 - NC AD20 - NC -
AD21 - NC AD21 - NC -
AD23 - NC AD23 - NC -
AD24 - NC AD24 - NC -
AD25 - NC AD25 - NC -
AD26 - NC AD26 - NC -
AE15 - GND AE15 - GND -
AE20 - NC AE20 - NC -
AE21 - NC AE21 - NC -
AE22 - NC AE22 - NC -
AE23 - NC AE23 - NC -
AE24 - GND AE24 - GND -
AE25 - NC AE25 - NC -
AE26 - NC AE26 - NC -
AF10 - GND AF10 - GND -
AF12 - GND AF12 - GND -
AF14 - GND AF14 - GND -
AF16 - GND AF16 - GND -
AF19 - NC AF19 - NC -
AF20 - NC AF20 - NC -
AF21 - GND AF21 - GND -
AF22 - NC AF22 - NC -
AF23 - NC AF23 - NC -
AF24 - NC AF24 - NC -
AF25 - NC AF25 - NC -
PH1P100SBG676 - - PH1A100SFG676 - - -