PH1A100&XC7A100

芯片对比: PH1A100FG324 VS XC7A100TCSG324 2019-10-9

IO BANK 12, 14

PH1A100FG324     XC7A100TCSG324 2019-10-9      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
T9 12 IO_L24P_12,D17 T9 14 IO_L24P_T3_A01_D17_14 -
K17 12 IO_L1P_12,D0,MOSI K17 14 IO_L1P_T0_D00_MOSI_14 -
K18 12 IO_L1N_12,D1,DIN,MISO K18 14 IO_L1N_T0_D01_DIN_14 -
L13 12 IO_L6P_12,SPICSN,BUSY L13 14 IO_L6P_T0_FCS_B_14 -
L14 12 IO_L2P_12,D2,WPN L14 14 IO_L2P_T0_D02_14 -
L15 12 IO_L3P_12,HSWAPEN L15 14 IO_L3P_T0_DQS_PUDC_B_14 -
L16 12 IO_L3N_12,USRCLK L16 14 IO_L3N_T0_DQS_EMCCLK_14 -
L18 12 IO_L4P_12,D4 L18 14 IO_L4P_T0_D04_14 -
M13 12 IO_L6N_12,D8 M13 14 IO_L6N_T0_D08_VREF_14 -
M14 12 IO_L2N_12,D3,HOLDN M14 14 IO_L2N_T0_D03_14 -
M16 12 IO_L10P_12,D14 M16 14 IO_L10P_T1_D14_14 -
M17 12 IO_L10N_12,D15 M17 14 IO_L10N_T1_D15_14 -
M18 12 IO_L4N_12,D5 M18 14 IO_L4N_T0_D05_14 -
N14 12 IO_L8P_12,D11 N14 14 IO_L8P_T1_D11_14 -
N15 12 IO_L11P_12,GCLKIOT3 N15 14 IO_L11P_T1_SRCC_14 PH1A100是全局时钟输入引脚, XC7A100是单区域时钟输入引脚。单端和差分均可从P端输入。
N16 12 IO_L11N_12,GCLKIOC3 N16 14 IO_L11N_T1_SRCC_14 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
N17 12 IO_L9P_12 N17 14 IO_L9P_T1_DQS_14 -
P14 12 IO_L8N_12,D12 P14 14 IO_L8N_T1_D12_14 -
P15 12 IO_L13P_12,GCLKIOT1 P15 14 IO_L13P_T2_MRCC_14 PH1A100是全局时钟输入引脚, XC7A100是多区域时钟输入引脚。单端和差分均可从P端输入。
P17 12 IO_L12P_12,GCLKIOT2 P17 14 IO_L12P_T1_MRCC_14 PH1A100是全局时钟输入引脚, XC7A100是多区域时钟输入引脚。单端和差分均可从P端输入。
P18 12 IO_L9N_12,D13 P18 14 IO_L9N_T1_DQS_D13_14 -
R10 12 IO_L25_12 R10 14 IO_25_14 -
R11 12 IO_L0_12 R11 14 IO_0_14 -
R12 12 IO_L5P_12,D6 R12 14 IO_L5P_T0_D06_14 -
R13 12 IO_L5N_12,D7 R13 14 IO_L5N_T0_D07_14 -
R15 12 IO_L13N_12,GCLKIOC1 R15 14 IO_L13N_T2_MRCC_14 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
R16 12 IO_L15P_12,RDWRN R16 14 IO_L15P_T2_DQS_RDWR_B_14 -
R17 12 IO_L12N_12,GCLKIOC2 R17 14 IO_L12N_T1_MRCC_14 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
R18 12 IO_L7P_12,D9 R18 14 IO_L7P_T1_D09_14 -
T10 12 IO_L24N_12,D16 T10 14 IO_L24N_T3_A00_D16_14 -
T11 12 IO_L19P_12,D26 T11 14 IO_L19P_T3_A10_D26_14 -
T13 12 IO_L23P_12,D19 T13 14 IO_L23P_T3_A03_D19_14 -
T14 12 IO_L14P_12,GCLKIOT0 T14 14 IO_L14P_T2_SRCC_14 PH1A100是全局时钟输入引脚, XC7A100是单区域时钟输入引脚。单端和差分均可从P端输入。
T15 12 IO_L14N_12,GCLKIOC0 T15 14 IO_L14N_T2_SRCC_14 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
T16 12 IO_L15N_12,CSON,DOUT T16 14 IO_L15N_T2_DQS_DOUT_CSO_B_14 -
T18 12 IO_L7N_12,D10 T18 14 IO_L7N_T1_D10_14 -
U11 12 IO_L19N_12,D25 U11 14 IO_L19N_T3_A09_D25_VREF_14 -
U12 12 IO_L20P_12,D24 U12 14 IO_L20P_T3_A08_D24_14 -
U13 12 IO_L23N_12,D18 U13 14 IO_L23N_T3_A02_D18_14 -
U14 12 IO_L22P_12,D21 U14 14 IO_L22P_T3_A05_D21_14 -
U16 12 IO_L18P_12,D28 U16 14 IO_L18P_T2_A12_D28_14 -
U17 12 IO_L17P_12,D30 U17 14 IO_L17P_T2_A14_D30_14 -
U18 12 IO_L17N_12,D29 U18 14 IO_L17N_T2_A13_D29_14 -
V10 12 IO_L21P_12 V10 14 IO_L21P_T3_DQS_14 -
V11 12 IO_L21N_12,D22 V11 14 IO_L21N_T3_DQS_A06_D22_14 -
V12 12 IO_L20N_12,D23 V12 14 IO_L20N_T3_A07_D23_14 -
V14 12 IO_L22N_12,D20 V14 14 IO_L22N_T3_A04_D20_14 -
V15 12 IO_L16P_12,CSN V15 14 IO_L16P_T2_CSI_B_14 -
V16 12 IO_L16N_12,D31 V16 14 IO_L16N_T2_A15_D31_14 -
V17 12 IO_L18N_12,D27 V17 14 IO_L18N_T2_A11_D27_14 -

IO BANK 13, 15

PH1A100FG324     XC7A100TCSG324 2019-10-9      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
A11 13 IO_L4N_13 A11 15 IO_L4N_T0_15 -
A13 13 IO_L9P_13 A13 15 IO_L9P_T1_DQS_AD3P_15 -
A14 13 IO_L9N_13 A14 15 IO_L9N_T1_DQS_AD3N_15 -
A15 13 IO_L8P_13 A15 15 IO_L8P_T1_AD10P_15 -
A16 13 IO_L8N_13 A16 15 IO_L8N_T1_AD10N_15 -
A18 13 IO_L10N_13 A18 15 IO_L10N_T1_AD11N_15 -
B11 13 IO_L4P_13 B11 15 IO_L4P_T0_15 -
B12 13 IO_L3N_13 B12 15 IO_L3N_T0_DQS_AD1N_15 -
B13 13 IO_L2P_13 B13 15 IO_L2P_T0_AD8P_15 -
B14 13 IO_L2N_13 B14 15 IO_L2N_T0_AD8N_15 -
B16 13 IO_L7P_13 B16 15 IO_L7P_T1_AD2P_15 -
B17 13 IO_L7N_13 B17 15 IO_L7N_T1_AD2N_15 -
B18 13 IO_L10P_13 B18 15 IO_L10P_T1_AD11P_15 -
C12 13 IO_L3P_13 C12 15 IO_L3P_T0_DQS_AD1P_15 -
C14 13 IO_L1N_13 C14 15 IO_L1N_T0_AD0N_15 -
C15 13 IO_L12N_13,GCLKIOC2 C15 15 IO_L12N_T1_MRCC_15 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
C16 13 IO_L20P_13 C16 15 IO_L20P_T3_A20_15 -
C17 13 IO_L20N_13 C17 15 IO_L20N_T3_A19_15 -
D12 13 IO_L6P_13 D12 15 IO_L6P_T0_15 -
D13 13 IO_L6N_13 D13 15 IO_L6N_T0_VREF_15 -
D14 13 IO_L1P_13 D14 15 IO_L1P_T0_AD0P_15 -
D15 13 IO_L12P_13,GCLKIOT2 D15 15 IO_L12P_T1_MRCC_15 PH1A100是全局时钟输入引脚, XC7A100是多区域时钟输入引脚。单端和差分均可从P端输入。
D17 13 IO_L16N_13 D17 15 IO_L16N_T2_A27_15 -
D18 13 IO_L21N_13 D18 15 IO_L21N_T3_DQS_A18_15 -
E15 13 IO_L11P_13,GCLKIOT3 E15 15 IO_L11P_T1_SRCC_15 PH1A100是全局时钟输入引脚, XC7A100是单区域时钟输入引脚。单端和差分均可从P端输入。
E16 13 IO_L11N_13,GCLKIOC3 E16 15 IO_L11N_T1_SRCC_15 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
E17 13 IO_L16P_13 E17 15 IO_L16P_T2_A28_15 -
E18 13 IO_L21P_13 E18 15 IO_L21P_T3_DQS_15 -
F13 13 IO_L5P_13 F13 15 IO_L5P_T0_AD9P_15 -
F14 13 IO_L5N_13 F14 15 IO_L5N_T0_AD9N_15 -
F15 13 IO_L14P_13,GCLKIOT0 F15 15 IO_L14P_T2_SRCC_15 PH1A100是全局时钟输入引脚, XC7A100是单区域时钟输入引脚。单端和差分均可从P端输入。
F16 13 IO_L14N_13,GCLKIOC0 F16 15 IO_L14N_T2_SRCC_15 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
F18 13 IO_L22N_13 F18 15 IO_L22N_T3_A16_15 -
G13 13 IO_L0_13 G13 15 IO_0_15 -
G14 13 IO_L15N_13 G14 15 IO_L15N_T2_DQS_ADV_B_15 -
G16 13 IO_L13N_13,GCLKIOC1 G16 15 IO_L13N_T2_MRCC_15 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
G17 13 IO_L18N_13 G17 15 IO_L18N_T2_A23_15 -
G18 13 IO_L22P_13 G18 15 IO_L22P_T3_A17_15 -
H14 13 IO_L15P_13 H14 15 IO_L15P_T2_DQS_15 -
H15 13 IO_L19N_13 H15 15 IO_L19N_T3_A21_VREF_15 -
H16 13 IO_L13P_13,GCLKIOT1 H16 15 IO_L13P_T2_MRCC_15 PH1A100是全局时钟输入引脚, XC7A100是多区域时钟输入引脚。单端和差分均可从P端输入。
H17 13 IO_L18P_13 H17 15 IO_L18P_T2_A24_15 -
J13 13 IO_L17N_13 J13 15 IO_L17N_T2_A25_15 -
J14 13 IO_L19P_13 J14 15 IO_L19P_T3_A22_15 -
J15 13 IO_L24N_13 J15 15 IO_L24N_T3_RS0_15 -
J17 13 IO_L23P_13 J17 15 IO_L23P_T3_FOE_B_15 -
J18 13 IO_L23N_13 J18 15 IO_L23N_T3_FWE_B_15 -
K13 13 IO_L17P_13 K13 15 IO_L17P_T2_A26_15 -
K15 13 IO_L24P_13 K15 15 IO_L24P_T3_RS1_15 -
K16 13 IO_L25_13 K16 15 IO_25_15 -

IO BANK 14, 16

PH1A100FG324     XC7A100TCSG324 2019-10-9      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
A8 14 IO_L12N_14,GCLKIOC2 A8 16 IO_L12N_T1_MRCC_16 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
A9 14 IO_L14N_14,GCLKIOC0 A9 16 IO_L14N_T2_SRCC_16 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
B8 14 IO_L12P_14,GCLKIOT2 B8 16 IO_L12P_T1_MRCC_16 PH1A100是全局时钟输入引脚, XC7A100是多区域时钟输入引脚。单端和差分均可从P端输入。
B9 14 IO_L11N_14,GCLKIOC3 B9 16 IO_L11N_T1_SRCC_16 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
C9 14 IO_L11P_14,GCLKIOT3 C9 16 IO_L11P_T1_SRCC_16 PH1A100是全局时钟输入引脚, XC7A100是单区域时钟输入引脚。单端和差分均可从P端输入。
D9 14 IO_L6N_14 D9 16 IO_L6N_T0_VREF_16 -
A10 14 IO_L14P_14,GCLKIOT0 A10 16 IO_L14P_T2_SRCC_16 PH1A100是全局时钟输入引脚, XC7A100是单区域时钟输入引脚。单端和差分均可从P端输入。
C10 14 IO_L13N_14,GCLKIOC1 C10 16 IO_L13N_T2_MRCC_16 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
C11 14 IO_L13P_14,GCLKIOT1 C11 16 IO_L13P_T2_MRCC_16 PH1A100是全局时钟输入引脚, XC7A100是多区域时钟输入引脚。单端和差分均可从P端输入。
D10 14 IO_L19N_14 D10 16 IO_L19N_T3_VREF_16 -

IO BANK 0, 24

PH1A100FG324     XC7A100TCSG324 2019-10-9      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
E9 24 IO_BM5_24,CCLK E9 0 CCLK_0 -
P7 24 IO_BM3_24,INITN P7 0 INIT_B_0 PH1A100需要上拉,推荐使用4.7K。
P8 24 IO_BM8_24,TRSTN P8 0 CFGBVS_0 PH1A100是作为jtag_rstn,默认需要下拉,用XC7A100用来控制多个config IOBANK的电压配置
P9 24 IO_BM0_24,PROGRAMN P9 0 PROGRAM_B_0 PH1A100需要上拉,推荐使用4.7K。
E10 24 IO_BM7_24,TCK E10 0 TCK_0 -
E11 24 IO_BM6_24,TDI E11 0 TDI_0 -
E12 24 IO_BM4N_24,TMS E12 0 TMS_0 -
E13 24 IO_BM4P_24,TDO E13 0 TDO_0 -
P10 24 IO_BM1P_24,DONE P10 0 DONE_0 PH1A100需要上拉,推荐使用4.7K,XC7A100推荐使用330R。
P11 24 IO_BM1N_24,M2 P11 0 M2_0 -
P12 24 IO_BM2N_24,M0 P12 0 M0_0 -
P13 24 IO_BM2P_24,M1 P13 0 M1_0 -

IO BANK 32, 34

PH1A100FG324     XC7A100TCSG324 2019-10-9      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
K3 32 IO_R2P_32 K3 34 IO_L2P_T0_34 -
K5 32 IO_R5P_32 K5 34 IO_L5P_T0_34 -
K6 32 IO_R0_32 K6 34 IO_0_34 -
L1 32 IO_R1P_32 L1 34 IO_L1P_T0_34 -
L3 32 IO_R2N_32 L3 34 IO_L2N_T0_34 -
L4 32 IO_R5N_32 L4 34 IO_L5N_T0_34 -
L5 32 IO_R6N_32 L5 34 IO_L6N_T0_VREF_34 -
L6 32 IO_R6P_32 L6 34 IO_L6P_T0_34 -
M1 32 IO_R1N_32 M1 34 IO_L1N_T0_34 -
M2 32 IO_R4N_32 M2 34 IO_L4N_T0_34 -
M3 32 IO_R4P_32 M3 34 IO_L4P_T0_34 -
M4 32 IO_R16P_32 M4 34 IO_L16P_T2_34 -
M6 32 IO_R18P_32 M6 34 IO_L18P_T2_34 -
N1 32 IO_R3N_32 N1 34 IO_L3N_T0_DQS_34 -
N2 32 IO_R3P_32 N2 34 IO_L3P_T0_DQS_34 -
N4 32 IO_R16N_32 N4 34 IO_L16N_T2_34 -
N5 32 IO_R13P_32,GCLKIOT1 N5 34 IO_L13P_T2_MRCC_34 PH1A100是全局时钟输入引脚, XC7A100是多区域时钟输入引脚。单端和差分均可从P端输入。
N6 32 IO_R18N_32 N6 34 IO_L18N_T2_34 -
P2 32 IO_R15P_32 P2 34 IO_L15P_T2_DQS_34 -
P3 32 IO_R14N_32,GCLKIOC0 P3 34 IO_L14N_T2_SRCC_34 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
P4 32 IO_R14P_32,GCLKIOT0 P4 34 IO_L14P_T2_SRCC_34 PH1A100是全局时钟输入引脚, XC7A100是单区域时钟输入引脚。单端和差分均可从P端输入。
P5 32 IO_R13N_32,GCLKIOC1 P5 34 IO_L13N_T2_MRCC_34 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
R1 32 IO_R17P_32 R1 34 IO_L17P_T2_34 -
R2 32 IO_R15N_32 R2 34 IO_L15N_T2_DQS_34 -
R3 32 IO_R11P_32,GCLKIOT3 R3 34 IO_L11P_T1_SRCC_34 PH1A100是全局时钟输入引脚, XC7A100是单区域时钟输入引脚。单端和差分均可从P端输入。
R5 32 IO_R19N_32 R5 34 IO_L19N_T3_VREF_34 -
R6 32 IO_R19P_32 R6 34 IO_L19P_T3_34 -
R7 32 IO_R23P_32 R7 34 IO_L23P_T3_34 -
R8 32 IO_R24P_32 R8 34 IO_L24P_T3_34 -
T1 32 IO_R17N_32 T1 34 IO_L17N_T2_34 -
T3 32 IO_R11N_32,GCLKIOC3 T3 34 IO_L11N_T1_SRCC_34 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
T4 32 IO_R12N_32,GCLKIOC2 T4 34 IO_L12N_T1_MRCC_34 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
T5 32 IO_R12P_32,GCLKIOT2 T5 34 IO_L12P_T1_MRCC_34 PH1A100是全局时钟输入引脚, XC7A100是多区域时钟输入引脚。单端和差分均可从P端输入。
T6 32 IO_R23N_32 T6 34 IO_L23N_T3_34 -
T8 32 IO_R24N_32 T8 34 IO_L24N_T3_34 -
U1 32 IO_R7P_32 U1 34 IO_L7P_T1_34 -
U2 32 IO_R9P_32 U2 34 IO_L9P_T1_DQS_34 -
U3 32 IO_R8N_32 U3 34 IO_L8N_T1_34 -
U4 32 IO_R8P_32 U4 34 IO_L8P_T1_34 -
U6 32 IO_R22N_32 U6 34 IO_L22N_T3_34 -
U7 32 IO_R22P_32 U7 34 IO_L22P_T3_34 -
U8 32 IO_R25_32 U8 34 IO_25_34 -
U9 32 IO_R21P_32 U9 34 IO_L21P_T3_DQS_34 -
V1 32 IO_R7N_32 V1 34 IO_L7N_T1_34 -
V2 32 IO_R9N_32 V2 34 IO_L9N_T1_DQS_34 -
V4 32 IO_R10N_32 V4 34 IO_L10N_T1_34 -
V5 32 IO_R10P_32 V5 34 IO_L10P_T1_34 -
V6 32 IO_R20N_32 V6 34 IO_L20N_T3_34 -
V7 32 IO_R20P_32 V7 34 IO_L20P_T3_34 -
V9 32 IO_R21N_32 V9 34 IO_L21N_T3_DQS_34 -

IO BANK 33, 35

PH1A100FG324     XC7A100TCSG324 2019-10-9      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
A1 33 IO_R9N_33 A1 35 IO_L9N_T1_DQS_AD7N_35 -
A3 33 IO_R8N_33 A3 35 IO_L8N_T1_AD14N_35 -
A4 33 IO_R8P_33 A4 35 IO_L8P_T1_AD14P_35 -
A5 33 IO_R3N_33 A5 35 IO_L3N_T0_DQS_AD5N_35 -
A6 33 IO_R3P_33 A6 35 IO_L3P_T0_DQS_AD5P_35 -
B1 33 IO_R9P_33 B1 35 IO_L9P_T1_DQS_AD7P_35 -
B2 33 IO_R10N_33 B2 35 IO_L10N_T1_AD15N_35 -
B3 33 IO_R10P_33 B3 35 IO_L10P_T1_AD15P_35 -
B4 33 IO_R7N_33 B4 35 IO_L7N_T1_AD6N_35 -
B6 33 IO_R2N_33 B6 35 IO_L2N_T0_AD12N_35 -
B7 33 IO_R2P_33 B7 35 IO_L2P_T0_AD12P_35 -
C1 33 IO_R16N_33 C1 35 IO_L16N_T2_35 -
C2 33 IO_R16P_33 C2 35 IO_L16P_T2_35 -
C4 33 IO_R7P_33 C4 35 IO_L7P_T1_AD6P_35 -
C5 33 IO_R1N_33 C5 35 IO_L1N_T0_AD4N_35 -
C6 33 IO_R1P_33 C6 35 IO_L1P_T0_AD4P_35 -
C7 33 IO_R4N_33 C7 35 IO_L4N_T0_35 -
D2 33 IO_R14N_33,GCLKIOC0 D2 35 IO_L14N_T2_SRCC_35 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
D3 33 IO_R12N_33,GCLKIOC2 D3 35 IO_L12N_T1_MRCC_35 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
D4 33 IO_R11N_33,GCLKIOC3 D4 35 IO_L11N_T1_SRCC_35 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
D5 33 IO_R11P_33,GCLKIOT3 D5 35 IO_L11P_T1_SRCC_35 PH1A100是全局时钟输入引脚, XC7A100是单区域时钟输入引脚。单端和差分均可从P端输入。
D7 33 IO_R6N_33 D7 35 IO_L6N_T0_VREF_35 -
D8 33 IO_R4P_33 D8 35 IO_L4P_T0_35 -
E1 33 IO_R18N_33 E1 35 IO_L18N_T2_35 -
E2 33 IO_R14P_33,GCLKIOT0 E2 35 IO_L14P_T2_SRCC_35 PH1A100是全局时钟输入引脚, XC7A100是单区域时钟输入引脚。单端和差分均可从P端输入。
E3 33 IO_R12P_33,GCLKIOT2 E3 35 IO_L12P_T1_MRCC_35 PH1A100是全局时钟输入引脚, XC7A100是多区域时钟输入引脚。单端和差分均可从P端输入。
E5 33 IO_R5N_33 E5 35 IO_L5N_T0_AD13N_35 -
E6 33 IO_R5P_33 E6 35 IO_L5P_T0_AD13P_35 -
E7 33 IO_R6P_33 E7 35 IO_L6P_T0_35 -
F1 33 IO_R18P_33 F1 35 IO_L18P_T2_35 -
F3 33 IO_R13N_33,GCLKIOC1 F3 35 IO_L13N_T2_MRCC_35 PH1A100和XC7A100在差分时钟的N端输入,不可输入单端时钟。
F4 33 IO_R13P_33,GCLKIOT1 F4 35 IO_L13P_T2_MRCC_35 PH1A100是全局时钟输入引脚, XC7A100是多区域时钟输入引脚。单端和差分均可从P端输入。
F5 33 IO_R0_33 F5 35 IO_0_35 -
F6 33 IO_R19N_33 F6 35 IO_L19N_T3_VREF_35 -
G1 33 IO_R17N_33 G1 35 IO_L17N_T2_35 -
G2 33 IO_R15N_33 G2 35 IO_L15N_T2_DQS_35 -
G3 33 IO_R20N_33 G3 35 IO_L20N_T3_35 -
G4 33 IO_R20P_33 G4 35 IO_L20P_T3_35 -
G6 33 IO_R19P_33 G6 35 IO_L19P_T3_35 -
H1 33 IO_R17P_33 H1 35 IO_L17P_T2_35 -
H2 33 IO_R15P_33 H2 35 IO_L15P_T2_DQS_35 -
H4 33 IO_R21N_33 H4 35 IO_L21N_T3_DQS_35 -
H5 33 IO_R24N_33 H5 35 IO_L24N_T3_35 -
H6 33 IO_R24P_33 H6 35 IO_L24P_T3_35 -
J2 33 IO_R22N_33 J2 35 IO_L22N_T3_35 -
J3 33 IO_R22P_33 J3 35 IO_L22P_T3_35 -
J4 33 IO_R21P_33 J4 35 IO_L21P_T3_DQS_35 -
J5 33 IO_R25_33 J5 35 IO_25_35 -
K1 33 IO_R23N_33 K1 35 IO_L23N_T3_35 -
K2 33 IO_R23P_33 K2 35 IO_L23P_T3_35 -

IO BANK 0, 14, 15, 16, 34, 35

PH1A100FG324     XC7A100TCSG324 2019-10-9      
引脚编号 IO BANK 引脚说明 引脚编号 IO BANK 引脚说明 差异备注
A2 - GND A2 - GND -
A7 - VCCIO_33 A7 35 VCCO_35 -
B5 - GND B5 - GND -
C3 - VCCIO_33 C3 35 VCCO_35 -
C8 - GND C8 - GND -
D1 - GND D1 - GND -
D6 - VCCIO_33 D6 35 VCCO_35 -
E4 - GND E4 - GND -
E8 - NC E8 0 VCCBATT_0 PH1A100为NC脚
F2 - VCCIO_33 F2 35 VCCO_35 -
F7 - GND F7 - GND -
F8 - VCCINT F8 - VCCINT PH1A100典型值为0.9V,XC7A100典型值为1.0V
F9 - GND F9 - GND -
G5 - VCCIO_33 G5 35 VCCO_35 -
G7 - VCCINT G7 - VCCINT -
G8 - GND G8 - GND -
G9 - VCCINT G9 - VCCINT -
H3 - GND H3 - GND -
H7 - GND H7 - GND -
H8 - VCCINT H8 - VCCINT -
H9 - NC H9 0 GNDADC_0 -
J1 - VCCIO_33 J1 35 VCCO_35 -
J6 - GND J6 - GND -
J7 - VCCINT J7 - VCCINT -
J8 - GND J8 - GND -
J9 - NC J9 0 VREFN_0 -
K4 - VCCIO_32 K4 34 VCCO_34 -
K7 - GND K7 - GND -
K8 - VCCINT K8 - VCCINT -
K9 - NC K9 0 VN_0 -
L2 - GND L2 - GND -
L7 - VCCINT L7 - VCCINT -
L8 - GND L8 - GND -
L9 - NC L9 0 DXN_0 -
M5 - GND M5 - GND -
M7 - GND M7 - GND -
M8 - VCCINT M8 - VCCINT -
M9 - GND M9 - GND -
N3 - VCCIO_32 N3 34 VCCO_34 -
N7 - VCCINT N7 - VCCINT -
N8 - GND N8 - GND -
N9 - VCCINT N9 - VCCINT -
P1 - GND P1 - GND -
P6 - VCCIO_32 P6 34 VCCO_34 -
R4 - GND R4 - GND -
R9 - VCCIO_24 R9 0 VCCO_0 PH1A100支持范围为1.425-3.465V,XC7A100支持范围为1.14-3.465V,即PH1A100不支持LVCMOS12电平标准
T2 - VCCIO_32 T2 34 VCCO_34 -
T7 - GND T7 - GND -
U5 - VCCIO_32 U5 34 VCCO_34 -
V3 - GND V3 - GND -
V8 - VCCIO_32 V8 34 VCCO_34 -
A12 - GND A12 - GND -
A17 - VCCIO_13 A17 15 VCCO_15 -
B10 - VCCIO_14 B10 16 VCCO_16 -
B15 - GND B15 - GND -
C13 - VCCIO_13 C13 15 VCCO_15 -
C18 - GND C18 - GND -
D11 - GND D11 - GND -
D16 - VCCIO_13 D16 15 VCCO_15 -
E14 - GND E14 - GND -
F10 - VCCINT F10 - VCCBRAM PH1A100典型值为0.9V,XC7A100典型值范围为1.0-1.89V
F11 - GND F11 - GND -
F12 - VCCAUX F12 - VCCAUX -
F17 - GND F17 - GND -
G10 - GND G10 - GND -
G11 - VCCINT G11 - VCCBRAM -
G12 - GND G12 - GND -
G15 - VCCIO_13 G15 15 VCCO_15 -
H10 - NC H10 0 VCCADC_0 -
H11 - GND H11 - GND -
H12 - VCCAUX H12 - VCCAUX -
H13 - GND H13 - GND -
H18 - VCCIO_13 H18 15 VCCO_15 -
J10 - NC J10 0 VP_0 -
J11 - VCCINT J11 - VCCINT -
J12 - GND J12 - GND -
J16 - GND J16 - GND -
K10 - NC K10 0 VREFP_0 -
K11 - GND K11 - GND -
K12 - VCCAUX K12 - VCCAUX -
K14 - VCCIO_13 K14 15 VCCO_15 -
L10 - NC L10 0 DXP_0 -
L11 - VCCINT L11 - VCCINT -
L12 - GND L12 - GND -
L17 - VCCIO_12 L17 14 VCCO_14 -
M10 - VCCINT M10 - VCCINT -
M11 - GND M11 - GND -
M12 - VCCAUX M12 - VCCAUX -
M15 - GND M15 - GND -
N10 - GND N10 - GND -
N11 - VCCINT N11 - VCCINT -
N12 - GND N12 - GND -
N13 - VCCIO_12 N13 14 VCCO_14 -
N18 - GND N18 - GND -
P16 - VCCIO_12 P16 14 VCCO_14 -
R14 - GND R14 - GND -
T12 - VCCIO_12 T12 14 VCCO_14 -
T17 - GND T17 - GND -
U10 - GND U10 - GND -
U15 - VCCIO_12 U15 14 VCCO_14 -
V13 - GND V13 - GND -
V18 - VCCIO_12 V18 14 VCCO_14 -
PH1A100FG324 - - XC7A100TCSG324 - - -