FBGA256
IO BANK 1
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| B1 | 1 | IO,DIFFIO_L5p | - |
| C1 | 1 | IO,D1,MOSI,DIFFIO_L4n | SPI |
| C2 | 1 | IO,DIFFIO_L4p | - |
| C3 | 1 | IO,DIFFIO_L2n | - |
| D1 | 1 | IO,DIFFIO_L6n | - |
| D2 | 1 | IO,SPICSN,BUSY,DIFFIO_L6p | SPI |
| D3 | 1 | IO,DIFFIO_L2p | - |
| D4 | 1 | IO,DIFFIO_L1n | - |
| E1 | 1 | IO,GCLK1n,DIFFIO_L11n | - |
| E2 | 1 | IO,GCLK1p,DIFFIO_L11p | - |
| E5 | 1 | IO,DIFFIO_L1p | - |
| F1 | 1 | IO,DIFFIO_L9n | - |
| F2 | 1 | IO,DIFFIO_L9p | - |
| F3 | 1 | IO,DIFFIO_L5n | - |
| F4 | 1 | INITN | Config_Dedicated |
| F5 | 1 | IO,DIFFIO_L3p | - |
| G1 | 1 | IO,DIFFIO_L7n | - |
| G2 | 1 | IO,DPCLK1,DIFFIO_L7p | - |
| G4 | 1 | IO,DIFFIO_L8n | - |
| G5 | 1 | IO,DIFFIO_L3n | - |
| H1 | 1 | CCLK | Config_Dedicated |
| H2 | 1 | IO,D0,DIFFIO_L8p,MISO | SPI |
| H3 | 1 | TCK | JTAG |
| H4 | 1 | TDI | JTAG |
| H5 | 1 | PROGRAMN | Config_Dedicated |
| J3 | 1 | CSN | Config_Dedicated |
| J4 | 1 | TDO | JTAG |
| J5 | 1 | TMS | JTAG |
IO BANK 2
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| J1 | 2 | IO,DIFFIO_L13n | - |
| J2 | 2 | IO,DIFFIO_L13p | - |
| J6 | 2 | IO,DIFFIO_L16p | - |
| K1 | 2 | IO,DIFFIO_L14n | - |
| K2 | 2 | IO,DIFFIO_L14p | - |
| K5 | 2 | IO,DIFFIO_L15p | - |
| K6 | 2 | IO,DIFFIO_L21p | - |
| K7 | 2 | IO,DIFFIO_L16n | - |
| L1 | 2 | IO,DIFFIO_L18n | - |
| L2 | 2 | IO,DPCLK2,DIFFIO_L18p | - |
| L3 | 2 | IO,DIFFIO_L20p | - |
| L4 | 2 | IO,DIFFIO_L15n | - |
| L6 | 2 | IO,DIFFIO_L21n | - |
| M1 | 2 | IO,GCLK2n,DIFFIO_L12n | - |
| M2 | 2 | IO,GCLK2p,DIFFIO_L12p | - |
| N1 | 2 | IO,DIFFIO_L17n | - |
| N2 | 2 | IO,DIFFIO_L17p | - |
| N5 | 2 | IO,PLL0_OUT2p,DIFFIO_L22p | - |
| N6 | 2 | IO,PLL0_OUT2n,DIFFIO_L22n | - |
| P1 | 2 | IO,DIFFIO_L19n | - |
| P2 | 2 | IO,DIFFIO_L19p | - |
| R1 | 2 | IO,DIFFIO_L20n | - |
IO BANK 3
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| K8 | 3 | IO,EDIFFIO_B3n | - |
| L7 | 3 | IO,EDIFFIO_B6p | - |
| L8 | 3 | IO,EDIFFIO_B10p | - |
| M6 | 3 | IO,EDIFFIO_B6n | - |
| M7 | 3 | IO,EDIFFIO_B3p | - |
| M8 | 3 | IO,EDIFFIO_B10n | - |
| N3 | 3 | IO,PLL0_CLKINp,EDIFFIO_B1p | - |
| N8 | 3 | IO,EDIFFIO_B11p | - |
| P3 | 3 | IO,PLL0_CLKINn,EDIFFIO_B1n | - |
| P6 | 3 | IO,EDIFFIO_B4n | - |
| P8 | 3 | IO,EDIFFIO_B11n | - |
| R3 | 3 | IO,EDIFFIO_B2p | - |
| R4 | 3 | IO,PLL0_OUT1p,EDIFFIO_B5p | - |
| R5 | 3 | IO,EDIFFIO_B7p | - |
| R6 | 3 | IO,EDIFFIO_B8p | - |
| R7 | 3 | IO,EDIFFIO_B9p | - |
| R8 | 3 | IO,GCLK3p,EDIFFIO_B12p | - |
| T2 | 3 | IO,DPCLK3,EDIFFIO_B4p | - |
| T3 | 3 | IO,EDIFFIO_B2n | - |
| T4 | 3 | IO,PLL0_OUT1n,EDIFFIO_B5n | - |
| T5 | 3 | IO,EDIFFIO_B7n | - |
| T6 | 3 | IO,EDIFFIO_B8n | - |
| T7 | 3 | IO,EDIFFIO_B9n | - |
| T8 | 3 | IO,GCLK3n,EDIFFIO_B12n | - |
IO BANK 4
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| K9 | 4 | IO,EDIFFIO_B14p | - |
| L9 | 4 | IO,EDIFFIO_B14n | - |
| M9 | 4 | IO,EDIFFIO_B15p | - |
| N9 | 4 | IO,EDIFFIO_B15n | - |
| P9 | 4 | IO,EDIFFIO_B16p | - |
| R9 | 4 | IO,GCLK4p,EDIFFIO_B13p | - |
| T9 | 4 | IO,GCLK4n,EDIFFIO_B13n | - |
| L11 | 4 | IO,EDIFFIO_B24n | - |
| M10 | 4 | IO,EDIFFIO_B19p | - |
| M11 | 4 | IO,EDIFFIO_B22p | - |
| N11 | 4 | IO,EDIFFIO_B19n | - |
| N12 | 4 | IO,EDIFFIO_B22n | - |
| P11 | 4 | IO,EDIFFIO_B16n | - |
| P14 | 4 | IO,EDIFFIO_B24p | - |
| R10 | 4 | IO,EDIFFIO_B17p | - |
| R11 | 4 | IO,EDIFFIO_B18p | - |
| R12 | 4 | IO,EDIFFIO_B20p | - |
| R13 | 4 | IO,EDIFFIO_B23p | - |
| T10 | 4 | IO,EDIFFIO_B17n | - |
| T11 | 4 | IO,EDIFFIO_B18n | - |
| T12 | 4 | IO,EDIFFIO_B20n | - |
| T13 | 4 | IO,EDIFFIO_B23n | - |
| T14 | 4 | IO,EDIFFIO_B21p | - |
| T15 | 4 | IO,DPCLK4,EDIFFIO_B21n | - |
IO BANK 5
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| J11 | 5 | IO,DIFFIO_R7p | - |
| J13 | 5 | IO,DIFFIO_R11n | - |
| K10 | 5 | IO,DIFFIO_R1p | - |
| K11 | 5 | IO,DIFFIO_R7n | - |
| K12 | 5 | IO,DIFFIO_R11p | - |
| K15 | 5 | IO,DPCLK5,DIFFIO_R9p | - |
| K16 | 5 | IO,DIFFIO_R9n | - |
| L10 | 5 | IO,DIFFIO_R1n | - |
| L12 | 5 | IO,DIFFIO_R3p | - |
| L13 | 5 | IO,DIFFIO_R8n | - |
| L14 | 5 | IO,DIFFIO_R8p | - |
| L15 | 5 | IO,DIFFIO_R10p | - |
| L16 | 5 | IO,DIFFIO_R10n | - |
| M12 | 5 | IO,DIFFIO_R3n | - |
| M15 | 5 | IO,GCLK5p,DIFFIO_R12p | - |
| M16 | 5 | IO,GCLK5n,DIFFIO_R12n | - |
| N13 | 5 | IO,DIFFIO_R4n | - |
| N14 | 5 | IO,DIFFIO_R4p | - |
| N15 | 5 | IO,DIFFIO_R6p | - |
| N16 | 5 | IO,DIFFIO_R6n | - |
| P15 | 5 | IO,DIFFIO_R2p | - |
| P16 | 5 | IO,DIFFIO_R5n | - |
| R14 | 5 | IO,DIFFIO_R2n | - |
| R16 | 5 | IO,DIFFIO_R5p | - |
IO BANK 6
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| B16 | 6 | IO,DPCLK6,DIFFIO_R21n | - |
| C14 | 6 | IO,PLL2_OUT2n,DIFFIO_R23n | - |
| C15 | 6 | IO,DIFFIO_R20p | - |
| C16 | 6 | IO,DIFFIO_R20n | - |
| D14 | 6 | IO,PLL2_OUT2p,DIFFIO_R23p | - |
| D15 | 6 | IO,DIFFIO_R18p | - |
| D16 | 6 | IO,DIFFIO_R18n | - |
| E15 | 6 | IO,GCLK6p,DIFFIO_R13p | - |
| E16 | 6 | IO,GCLK6n,DIFFIO_R13n | - |
| F13 | 6 | IO,DIFFIO_R22p | - |
| F14 | 6 | IO,DIFFIO_R21p | - |
| F15 | 6 | IO,USRCLK,DIFFIO_R19p | - |
| F16 | 6 | IO,CSON,DOUT,DIFFIO_R19n | Config_Option |
| G11 | 6 | IO,DIFFIO_R22n | - |
| G12 | 6 | MSEL2 | Config_Dedicated |
| G15 | 6 | IO,DIFFIO_R17p | - |
| G16 | 6 | IO,DIFFIO_R17n | - |
| H12 | 6 | MSEL1 | Config_Dedicated |
| H13 | 6 | MSEL0 | Config_Dedicated |
| H14 | 6 | DONE | Config_Dedicated |
| H15 | 6 | IO,DIFFIO_R16p | - |
| H16 | 6 | IO,DIFFIO_R16n | - |
| J12 | 6 | IO,DIFFIO_R14p | - |
| J14 | 6 | IO,DIFFIO_R14n | - |
| J15 | 6 | IO,DIFFIO_R15p | - |
| J16 | 6 | IO,DIFFIO_R15n | - |
IO BANK 7
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| A9 | 7 | IO,GCLK7n,EDIFFIO_T12n | - |
| B9 | 7 | IO,GCLK7p,EDIFFIO_T12p | - |
| C9 | 7 | IO,EDIFFIO_T11n | - |
| D9 | 7 | IO,EDIFFIO_T11p | - |
| E9 | 7 | IO,EDIFFIO_T8p | - |
| F9 | 7 | IO,EDIFFIO_T7p | - |
| A10 | 7 | IO,EDIFFIO_T10n | - |
| A11 | 7 | IO,EDIFFIO_T9n | - |
| A12 | 7 | IO,EDIFFIO_T5n | - |
| A13 | 7 | IO,EDIFFIO_T4n | - |
| A14 | 7 | IO,PLL2_OUT1n,EDIFFIO_T3n | - |
| A15 | 7 | IO,PLL2_CLKIN0,EDIFFIO_T2p | - |
| B10 | 7 | IO,EDIFFIO_T10p | - |
| B11 | 7 | IO,EDIFFIO_T9p | - |
| B12 | 7 | IO,EDIFFIO_T5p | - |
| B13 | 7 | IO,EDIFFIO_T4p | - |
| B14 | 7 | IO,PLL2_OUT1p,EDIFFIO_T3p | - |
| C11 | 7 | IO,EDIFFIO_T6p | - |
| D11 | 7 | IO,EDIFFIO_T1n | - |
| D12 | 7 | IO,DPCLK7,EDIFFIO_T1p | - |
| E10 | 7 | IO,EDIFFIO_T8n | - |
| E11 | 7 | IO,EDIFFIO_T6n | - |
| F10 | 7 | IO,EDIFFIO_T7n | - |
| F11 | 7 | IO,PLL2_CLKI1n,EDIFFIO_T2n | - |
IO BANK 8
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| A2 | 8 | IO,D13,EDIFFIO_T21n | - |
| A3 | 8 | IO,D9,EDIFFIO_T24n | - |
| A4 | 8 | IO,D11,EDIFFIO_T22n | - |
| A5 | 8 | IO,D7,EDIFFIO_T18n | Config_Option |
| A6 | 8 | IO,EDIFFIO_T15n | - |
| A7 | 8 | IO,D8,EDIFFIO_T24p | - |
| A8 | 8 | IO,GCLK8n,EDIFFIO_T13n | - |
| B3 | 8 | IO,DPCLK8,EDIFFIO_T23p | - |
| B4 | 8 | IO,D10,EDIFFIO_T22p | - |
| B5 | 8 | IO,D12,EDIFFIO_T21p | - |
| B6 | 8 | IO,EDIFFIO_T15p | - |
| B7 | 8 | IO,D4,EDIFFIO_T23n | Config_Option |
| B8 | 8 | IO,GCLK8p,EDIFFIO_T13p | - |
| C6 | 8 | IO,EDIFFIO_T18p | - |
| C8 | 8 | IO,EDIFFIO_T14n | - |
| D5 | 8 | IO,D15,EDIFFIO_T20n | - |
| D6 | 8 | IO,D14,EDIFFIO_T20p | - |
| D8 | 8 | IO,EDIFFIO_T14p | - |
| E6 | 8 | IO,D6,EDIFFIO_T19p | Config_Option |
| E7 | 8 | IO,D5,EDIFFIO_T19n | Config_Option |
| E8 | 8 | IO,D2,EDIFFIO_T16n | Config_Option |
| F6 | 8 | IO,EDIFFIO_T17n | - |
| F7 | 8 | IO,EDIFFIO_T17p | - |
| F8 | 8 | IO,D3,EDIFFIO_T16p | Config_Option |
IO BANK Other
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| A1 | - | VCCIO8 | - |
| B2 | - | GND | - |
| C4 | - | VCCIO8 | - |
| C5 | - | GND | - |
| C7 | - | VCCIO8 | - |
| D7 | - | GND | - |
| E3 | - | VCCIO1 | - |
| E4 | - | GND | - |
| G3 | - | VCCIO1 | - |
| G6 | - | VCCINT | - |
| G7 | - | VCCINT | - |
| G8 | - | VCCINT | - |
| G9 | - | VCCINT | - |
| H6 | - | VCCINT | - |
| H7 | - | GND | - |
| H8 | - | GND | - |
| H9 | - | GND | - |
| J7 | - | GND | - |
| J8 | - | GND | - |
| J9 | - | GND | - |
| K3 | - | VCCIO2 | - |
| K4 | - | GND | - |
| L5 | - | VCCAUX | - |
| M3 | - | VCCIO2 | - |
| M4 | - | GND | - |
| M5 | - | GND_PLLA0 | - |
| N4 | - | VCC_PLLA0 | - |
| N7 | - | GND | - |
| P4 | - | VCCIO3 | - |
| P5 | - | GND | - |
| P7 | - | VCCIO3 | - |
| R2 | - | GND | - |
| T1 | - | VCCIO3 | - |
| A16 | - | VCCIO7 | - |
| B15 | - | GND | - |
| C10 | - | VCCIO7 | - |
| C12 | - | GND | - |
| C13 | - | VCCIO7 | - |
| D10 | - | GND | - |
| D13 | - | VCC_PLLA2 | - |
| E12 | - | GND_PLLA2 | - |
| E13 | - | GND | - |
| E14 | - | VCCIO6 | - |
| F12 | - | VCCAUX | - |
| G10 | - | VCCINT | - |
| G13 | - | GND | - |
| G14 | - | VCCIO6 | - |
| H10 | - | GND | - |
| H11 | - | VCCINT | - |
| J10 | - | GND | - |
| K13 | - | GND | - |
| K14 | - | VCCIO5 | - |
| M13 | - | GND | - |
| M14 | - | VCCIO5 | - |
| N10 | - | GND | - |
| P10 | - | VCCIO4 | - |
| P12 | - | GND | - |
| P13 | - | VCCIO4 | - |
| R15 | - | GND | - |
| T16 | - | VCCIO4 | - |
TQFP144
IO BANK 1
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| 1 | 1 | IO,DIFFIO_L1n | - |
| 2 | 1 | IO,DIFFIO_L1p | - |
| 3 | 1 | IO,DIFFIO_L2p | - |
| 4 | 1 | GND | - |
| 5 | 1 | VCCINT | - |
| 6 | 1 | IO,D1,MOSI,DIFFIO_L4n | SPI |
| 7 | 1 | IO,DIFFIO_L5n | - |
| 8 | 1 | IO,SPICSN,BUSY,DIFFIO_L6p | SPI |
| 9 | 1 | INITN | Config_Dedicated |
| 10 | 1 | IO,DPCLK1,DIFFIO_L7p | - |
| 11 | 1 | IO,DIFFIO_L7n | - |
| 12 | 1 | CCLK | Config_Dedicated |
| 13 | 1 | IO,D0,DIFFIO_L8p,MISO | SPI |
| 14 | 1 | PROGRAMN | Config_Dedicated |
| 15 | 1 | TDI | JTAG |
| 16 | 1 | TCK | JTAG |
| 17 | 1 | VCCIO1 | - |
| 18 | 1 | TMS | JTAG |
| 19 | 1 | GND | - |
| 20 | 1 | TDO | JTAG |
| 21 | 1 | CSN | Config_Dedicated |
| 22 | 1 | GND | - |
| 23 | 1 | IO,GCLK1n,DIFFIO_L11n | - |
IO BANK 2
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| 24 | 2 | IO,GCLK2p,DIFFIO_L12p | - |
| 25 | 2 | IO,GCLK2n,DIFFIO_L12n | - |
| 26 | 2 | VCCIO2 | - |
| 27 | 2 | GND | - |
| 28 | 2 | IO,DIFFIO_L16n | - |
| 29 | 2 | VCCINT | - |
| 30 | 2 | IO,DPCLK2,DIFFIO_L18p | - |
| 31 | 2 | IO,DIFFIO_L19p | - |
| 32 | 2 | IO,DIFFIO_L20p | - |
| 33 | 2 | IO,DIFFIO_L20n | - |
| 34 | 2 | IO,DIFFIO_L21p | - |
| 35 | 2 | VCCAUX | - |
| 36 | 2 | GND_PLLA0 | - |
IO BANK 3
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| 37 | 3 | VCC_PLLA0 | - |
| 38 | 3 | IO,PLL0_CLKIN0,EDIFFIO_B1p | - |
| 39 | 3 | IO,PLL0_CLKIN1,EDIFFIO_B1n | - |
| 40 | 3 | VCCIO3 | - |
| 41 | 3 | GND | - |
| 42 | 3 | IO,DPCLK3,EDIFFIO_B4p | - |
| 43 | 3 | IO,PLL0_OUT1p,EDIFFIO_B5p | - |
| 44 | 3 | IO,PLL0_OUT1n,EDIFFIO_B5n | - |
| 45 | 3 | VCCINT | - |
| 46 | 3 | IO,EDIFFIO_B6n | - |
| 47 | 3 | VCCIO3 | - |
| 48 | 3 | GND | - |
| 49 | 3 | IO,EDIFFIO_B9p | - |
| 50 | 3 | IO,EDIFFIO_B9n | - |
| 51 | 3 | IO,EDIFFIO_B10p | - |
| 52 | 3 | IO,GCLK3p,EDIFFIO_B12p | - |
| 53 | 3 | IO,GCLK3n,EDIFFIO_B12n | - |
IO BANK 4
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| 54 | 4 | IO,GCLK4p,EDIFFIO_B13p | - |
| 55 | 4 | IO,GCLK4n,EDIFFIO_B13n | - |
| 56 | 4 | VCCIO4 | - |
| 57 | 4 | GND | - |
| 58 | 4 | IO,EDIFFIO_B16p | - |
| 59 | 4 | IO,EDIFFIO_B17p | - |
| 60 | 4 | IO,EDIFFIO_B17n | - |
| 62 | 4 | VCCIO4 | - |
| 63 | 4 | GND | - |
| 64 | 4 | IO,EDIFFIO_B19p | - |
| 65 | 4 | IO,EDIFFIO_B19n | - |
| 66 | 4 | IO,EDIFFIO_B20p | - |
| 67 | 4 | IO,EDIFFIO_B20n | - |
| 68 | 4 | IO,DPCLK4,EDIFFIO_B21n | - |
| 69 | 4 | IO,EDIFFIO_B22p | - |
| 70 | 4 | IO,EDIFFIO_B23p | - |
| 71 | 4 | IO,EDIFFIO_B23n | - |
| 72 | 4 | IO,EDIFFIO_B24n | - |
| 61 | 4 | VCCINT | - |
IO BANK 5
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| 73 | 5 | IO,DIFFIO_R1n | - |
| 74 | 5 | IO,DIFFIO_R1p | - |
| 75 | 5 | IO,DIFFIO_R2n | - |
| 76 | 5 | IO,DIFFIO_R3n | - |
| 77 | 5 | IO,DIFFIO_R3p | - |
| 78 | 5 | VCCINT | - |
| 79 | 5 | GND | - |
| 80 | 5 | IO,DIFFIO_R5p | - |
| 81 | 5 | VCCIO5 | - |
| 82 | 5 | GND | - |
| 83 | 5 | IO,DIFFIO_R8n | - |
| 84 | 5 | IO,DIFFIO_R9n | - |
| 85 | 5 | IO,DPCLK5,DIFFIO_R9p | - |
| 86 | 5 | IO,DIFFIO_R10n | - |
| 87 | 5 | IO,DIFFIO_R10p | - |
| 88 | 5 | IO,GCLK5n,DIFFIO_R12n | - |
| 89 | 5 | IO,GCLK5p,DIFFIO_R12p | - |
IO BANK 6
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| 90 | 6 | IO,GCLK6n,DIFFIO_R13n | - |
| 91 | 6 | IO,GCLK6p,DIFFIO_R13p | - |
| 92 | 6 | DONE | Config_Dedicated |
| 93 | 6 | VCCIO6 | - |
| 94 | 6 | MSEL0 | Config_Dedicated |
| 95 | 6 | GND | - |
| 96 | 6 | MSEL1 | Config_Dedicated |
| 97 | 6 | MSEL2 | Config_Dedicated |
| 98 | 6 | IO,DIFFIO_R17n | - |
| 99 | 6 | IO,DIFFIO_R17p | - |
| 100 | 6 | IO,DIFFIO_R18n | - |
| 101 | 6 | IO,CSON,DOUT,DIFFIO_R19n | Config_Option |
| 102 | 6 | VCCINT | - |
| 103 | 6 | IO,USRCLK,DIFFIO_R19p | - |
| 104 | 6 | IO,DPCLK6,DIFFIO_R21n | - |
| 105 | 6 | IO,DIFFIO_R21p | - |
| 106 | 6 | IO,DIFFIO_R22p | - |
| 107 | 6 | VCCAUX | - |
| 108 | 6 | GND_PLLA2 | - |
IO BANK 7
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| 109 | 7 | VCC_PLLA2 | - |
| 110 | 7 | IO,DPCLK7,EDIFFIO_T1p | - |
| 111 | 7 | IO,PLL2_CLKI1n,EDIFFIO_T2n | - |
| 112 | 7 | IO,PLL2_OUT1n,EDIFFIO_T3n | - |
| 113 | 7 | IO,PLL2_OUT1p,EDIFFIO_T3p | - |
| 114 | 7 | IO,EDIFFIO_T4n | - |
| 115 | 7 | IO,EDIFFIO_T4p | - |
| 116 | 7 | VCCINT | - |
| 117 | 7 | VCCIO7 | - |
| 118 | 7 | GND | - |
| 119 | 7 | IO,EDIFFIO_T7p | - |
| 120 | 7 | IO,EDIFFIO_T8n | - |
| 122 | 7 | VCCIO7 | - |
| 123 | 7 | GND | - |
| 124 | 7 | IO,EDIFFIO_T10p | - |
| 125 | 7 | IO,EDIFFIO_T11p | - |
| 126 | 7 | IO,GCLK7n,EDIFFIO_T12n | - |
| 127 | 7 | IO,GCLK7p,EDIFFIO_T12p | - |
| 121 | 7 | IO,EDIFFIO_T8p | - |
IO BANK 8
| 引脚编号 | IO BANK | 引脚说明 | Config_Type |
|---|---|---|---|
| 128 | 8 | IO,GCLK8n,EDIFFIO_T13n | - |
| 129 | 8 | IO,GCLK8p,EDIFFIO_T13p | - |
| 130 | 8 | VCCIO8 | - |
| 131 | 8 | GND | - |
| 132 | 8 | IO,D2,EDIFFIO_T16n | Config_Option |
| 133 | 8 | IO,D3,EDIFFIO_T16p | Config_Option |
| 134 | 8 | VCCINT | - |
| 135 | 8 | IO,D7,EDIFFIO_T18n | Config_Option |
| 136 | 8 | IO,EDIFFIO_T18p | - |
| 137 | 8 | IO,D5,EDIFFIO_T19n | Config_Option |
| 138 | 8 | IO,D6,EDIFFIO_T19p | Config_Option |
| 139 | 8 | VCCIO8 | - |
| 140 | 8 | GND | - |
| 141 | 8 | IO,D4,EDIFFIO_T23n | Config_Option |
| 142 | 8 | IO,DPCLK8,EDIFFIO_T23p | - |
| 143 | 8 | IO,D9,EDIFFIO_T24n | - |
| 144 | 8 | IO,D8,EDIFFIO_T24p | - |
ELF650&XO256
芯片对比: Anlogic ELF650 LQFP100 VS LATTICE LCMXO256 TQFP100
IO BANK 0
| Anlogic ELF650 LQFP100 | LATTICE LCMXO256 TQFP100 | |||||
|---|---|---|---|---|---|---|
| 引脚编号 | IO BANK | 引脚说明 | 引脚编号 | IO BANK | 引脚说明 | 差异备注 |
| 77 | 0 | IO | 77 | 0 | PT5C | - |
| 78 | 0 | IO | 78 | 0 | PT5B | ELF只支持伪差分输出 |
| 79 | 0 | IO | 79 | 0 | PT5A | ELF只支持伪差分输出 |
| 80 | 0 | IO | 80 | 0 | PT4F | ELF只支持伪差分输出 |
| 81 | 0 | IO | 81 | 0 | PT4E | ELF只支持伪差分输出 |
| 82 | 0 | IO | 82 | 0 | PT4D | ELF只支持伪差分输出 |
| 83 | 0 | IO | 83 | 0 | PT4C | ELF只支持伪差分输出 |
| 84 | 0 | GND | 84 | - | GND | - |
| 85 | 0 | IO | 85 | 0 | PT4B | ELF只支持伪差分输出 |
| 86 | 0 | IO | 86 | 0 | PT4A | ELF只支持伪差分输出 |
| 87 | 0 | IO | 87 | 0 | PT3D | ELF只支持伪差分输出 |
| 88 | 0 | IO | 88 | - | VCCAUX | ELF JTAG配置脚可通过软件设置为GPIO，用JTAGEN脚取回JTAG控制权限，不需要JTAG引脚复用时，该引脚可用作GPIO |
| 89 | 0 | IO | 89 | 0 | PT3C | ELF只支持伪差分输出 |
| 90 | 0 | VCCEXT | 90 | - | VCC | - |
| 91 | 0 | IO | 91 | 0 | PT3B | ELF只支持伪差分输出 |
| 92 | 0 | VCCIO0 | 92 | 0 | VCCIO0 | BANK电压，ELF650和XO256BANK划分不同 |
| 93 | 0 | VSSIO | 93 | 0 | GNDIO0 | - |
| 94 | 0 | IO | 94 | 0 | PT3A | ELF只支持伪差分输出 |
| 95 | 0 | IO | 95 | 0 | PT2F | ELF只支持伪差分输出 |
| 96 | 0 | IO | 96 | 0 | PT2E | ELF只支持伪差分输出 |
| 97 | 0 | IO | 97 | 0 | PT2D | ELF只支持伪差分输出 |
| 98 | 0 | IO | 98 | 0 | PT2C | ELF只支持伪差分输出 |
| 99 | 0 | IO | 99 | 0 | PT2B | ELF只支持伪差分输出 |
| 100 | 0 | IO | 100 | 0 | PT2A | ELF只支持伪差分输出 |
IO BANK 0, 1
| Anlogic ELF650 LQFP100 | LATTICE LCMXO256 TQFP100 | |||||
|---|---|---|---|---|---|---|
| 引脚编号 | IO BANK | 引脚说明 | 引脚编号 | IO BANK | 引脚说明 | 差异备注 |
| 51 | 1 | IO,LVDSR0N | 51 | 0 | PR9B | - |
| 52 | 1 | IO,LVDSR0P | 52 | 0 | PR9A | - |
| 53 | 1 | IO,LVDSR1N | 53 | 0 | PR8B | - |
| 54 | 1 | IO,LVDSR1P | 54 | 0 | PR8A | - |
| 55 | 1 | IO,LVDSR2N | 55 | 0 | PR7D | - |
| 56 | 1 | IO,LVDSR2P | 56 | 0 | PR7C | - |
| 57 | 1 | IO,LVDSR3N | 57 | 0 | PR7B | - |
| 58 | 1 | IO,LVDSR3P | 58 | 0 | PR7A | - |
| 59 | 1 | IO,LVDSR4N | 59 | 0 | PR6B | - |
| 60 | 1 | VCCIO1 | 60 | 0 | VCCIO0 | BANK电压，ELF650和XO256BANK划分不同 |
| 61 | 1 | IO,LVDSR4P | 61 | 0 | PR6A | - |
| 62 | 1 | VSSIO | 62 | 0 | GNDIO0 | - |
| 63 | 1 | IO,LVDSR5N | 63 | 0 | PR5D | - |
| 64 | 1 | IO,LVDSR5P | 64 | 0 | PR5C | - |
| 65 | 1 | IO,GCLKP_2,LVDSR6N | 65 | 0 | PR5B | ELF是全局时钟输入引脚 |
| 66 | 1 | IO,GCLKP_3,LVDSR6P | 66 | 0 | PR5A | ELF是全局时钟输入引脚 |
| 67 | 1 | IO,LVDSR7N | 67 | 0 | PR4B | - |
| 68 | 1 | IO,LVDSR7P | 68 | 0 | PR4A | - |
| 69 | 1 | IO,LVDSR8N | 69 | 0 | PR3D | - |
| 70 | 1 | IO,LVDSR8P | 70 | 0 | PR3C | - |
| 71 | 1 | IO,LVDSR9N | 71 | 0 | PR3B | - |
| 72 | 1 | IO,LVDSR9P | 72 | 0 | PR3A | - |
| 73 | 1 | IO,LVDSR10N | 73 | 0 | PR2B | - |
| 74 | 1 | VCCIO1 | 74 | 0 | VCCIO0 | BANK电压，ELF650和XO256BANK划分不同 |
| 75 | 1 | VSSIO | 75 | 0 | GNDIO0 | - |
| 76 | 1 | IO,LVDSR10P | 76 | 0 | PR2A | - |
IO BANK 1, 2
| Anlogic ELF650 LQFP100 | LATTICE LCMXO256 TQFP100 | |||||
|---|---|---|---|---|---|---|
| 引脚编号 | IO BANK | 引脚说明 | 引脚编号 | IO BANK | 引脚说明 | 差异备注 |
| 26 | 2 | IO,TMS | 26 | 1 | TMS | - |
| 27 | 2 | IO | 27 | 1 | PL9B | ELF只支持伪差分输出 |
| 28 | 2 | IO,TCK | 28 | 1 | TCK | - |
| 29 | 2 | IO,MISO | 29 | 1 | PB2A | ELF只支持伪差分输出，XO不支持MSPI加载方式 |
| 30 | 2 | IO,SPICSN | 30 | 1 | PB2B | ELF只支持伪差分输出，XO不支持MSPI加载方式 |
| 31 | 2 | IO,TDO | 31 | 1 | TDO | - |
| 32 | 2 | IO,SCLK | 32 | 1 | PB2C | ELF只支持伪差分输出，XO不支持MSPI加载方式 |
| 33 | 2 | IO,TDI | 33 | 1 | TDI | - |
| 34 | 2 | IO,MOSI | 34 | 1 | PB2D | ELF只支持伪差分输出，XO不支持MSPI加载方式 |
| 35 | 2 | VCCEXT | 35 | - | VCC | VCC |
| 36 | 2 | IO,GCLK5 | 36 | 1 | PB3A | ELF只支持伪差分输出 |
| 37 | 2 | IO | 37 | 1 | PB3B | ELF只支持伪差分输出 |
| 38 | 2 | IO,GCLK4 | 38 | 1 | PB3C | ELF只支持伪差分输出 |
| 39 | 2 | IO | 39 | 1 | PB3D | ELF只支持伪差分输出 |
| 40 | 2 | GND | 40 | - | GND | - |
| 41 | 2 | VCCIO2 | 41 | 1 | VCCIO1 | BANK电压，ELF650和XO256BANK划分不同 |
| 42 | 2 | VSSIO | 42 | 1 | GNDIO1 | - |
| 43 | 2 | IO | 43 | 1 | PB4A | ELF只支持伪差分输出 |
| 44 | 2 | IO,PROGRAMN | 44 | 1 | PB4B | ELF只支持伪差分输出,ELF该引脚必须外部上拉 |
| 45 | 2 | IO,SCL | 45 | 1 | PB4C | ELF只支持伪差分输出 |
| 46 | 2 | IO,SDA | 46 | 1 | PB4D | ELF只支持伪差分输出 |
| 47 | 2 | IO,INITN | 47 | 1 | PB5A | ELF该引脚必须外部上拉 |
| 48 | 2 | IO,PWRDWN | 48 | - | SLEEPN | - |
| 49 | 2 | IO | 49 | 1 | PB5C | ELF只支持伪差分输出 |
| 50 | 2 | IO,DONE | 50 | 1 | PB5D | ELF只支持伪差分输出 |
IO BANK 1, 3
| Anlogic ELF650 LQFP100 | LATTICE LCMXO256 TQFP100 | |||||
|---|---|---|---|---|---|---|
| 引脚编号 | IO BANK | 引脚说明 | 引脚编号 | IO BANK | 引脚说明 | 差异备注 |
| 1 | 3 | IO | 1 | 1 | PL2A | ELF只支持伪差分输出 |
| 2 | 3 | IO | 2 | 1 | PL2B | ELF只支持伪差分输出 |
| 3 | 3 | IO | 3 | 1 | PL3A | ELF只支持伪差分输出 |
| 4 | 3 | IO | 4 | 1 | PL3B | ELF只支持伪差分输出 |
| 5 | 3 | IO | 5 | 1 | PL3C | ELF只支持伪差分输出 |
| 6 | 3 | IO | 6 | 1 | PL3D | ELF只支持伪差分输出 |
| 7 | 3 | IO | 7 | 1 | PL4A | ELF只支持伪差分输出 |
| 8 | 3 | IO | 8 | 1 | PL4B | ELF只支持伪差分输出 |
| 9 | 3 | IO | 9 | 1 | PL5A | ELF只支持伪差分输出 |
| 10 | 3 | VCCIO3 | 10 | 1 | VCCIO1 | BANK电压，ELF650和XO256BANK划分不同 |
| 11 | 3 | IO | 11 | 1 | PL5B | ELF只支持伪差分输出 |
| 12 | 3 | VSSIO | 12 | 1 | GNDIO1 | - |
| 13 | 3 | IO | 13 | 1 | PL5C | ELF只支持伪差分输出 |
| 14 | 3 | IO | 14 | 1 | PL5D | ELF只支持伪差分输出 |
| 15 | 3 | IO,GCLK7 | 15 | 1 | PL6A | ELF只支持伪差分输出，ELF该引脚为全局时钟输入脚 |
| 16 | 3 | IO | 16 | 1 | PL6B | ELF只支持伪差分输出 |
| 17 | 3 | IO | 17 | 1 | PL7A | ELF只支持伪差分输出 |
| 18 | 3 | IO | 18 | 1 | PL7B | ELF只支持伪差分输出 |
| 19 | 3 | IO | 19 | 1 | PL7C | ELF只支持伪差分输出 |
| 20 | 3 | IO | 20 | 1 | PL7D | ELF只支持伪差分输出 |
| 21 | 3 | IO | 21 | 1 | PL8A | ELF只支持伪差分输出 |
| 22 | 3 | IO | 22 | 1 | PL8B | ELF只支持伪差分输出 |
| 23 | 3 | IO | 23 | 1 | PL9A | ELF只支持伪差分输出 |
| 24 | 3 | VCCIO3 | 24 | 1 | VCCIO1 | BANK电压，ELF650和XO256BANK划分不同 |
| 25 | 3 | VSSIO | 25 | 1 | GNDIO1 | - |
ELF650&XO640
芯片对比: Anlogic ELF650 LQFP100 VS LATTICE LCMXO640 TQFP100
IO BANK 0
| Anlogic ELF650 LQFP100 | LATTICE LCMXO640 TQFP100 | |||||
|---|---|---|---|---|---|---|
| 引脚编号 | IO BANK | 引脚说明 | 引脚编号 | IO BANK | 引脚说明 | 差异备注 |
| 77 | 0 | IO | 77 | 0 | PT9E | ELF只支持伪差分输出 |
| 78 | 0 | IO | 78 | 0 | PT9C | - |
| 79 | 0 | IO | 79 | 0 | PT9A | - |
| 80 | 0 | IO | 80 | 0 | VCCIO0 | XO为BANK0电压，ELF为GPIO |
| 81 | 0 | IO | 81 | 0 | GNDIO | XO为BANK0地，ELF为GPIO |
| 82 | 0 | IO | 82 | 0 | PT7E | - |
| 83 | 0 | IO | 83 | 0 | PT7A | - |
| 84 | 0 | GND | 84 | - | GND | - |
| 85 | 0 | IO | 85 | 0 | PT6B | - |
| 86 | 0 | IO | 86 | 0 | PT5B | ELF只支持伪差分输出 |
| 87 | 0 | IO | 87 | 0 | PT5A | ELF只支持伪差分输出 |
| 88 | 0 | IO | 88 | - | VCCAUX | ELF JTAG配置脚可通过软件设置为GPIO，用JTAGEN脚取回JTAG控制权限，不需要JTAG引脚复用时，该引脚可用作GPIO |
| 89 | 0 | IO | 89 | 0 | PT4F | - |
| 90 | 0 | VCCEXT | 90 | - | VCC | - |
| 91 | 0 | IO | 91 | 0 | PT3F | - |
| 92 | 0 | VCCIO0 | 92 | 0 | VCCIO0 | - |
| 93 | 0 | VSSIO | 93 | 0 | GNDIO | - |
| 94 | 0 | IO | 94 | 0 | PT3B | ELF只支持伪差分输出 |
| 95 | 0 | IO | 95 | 0 | PT3A | ELF只支持伪差分输出 |
| 96 | 0 | IO | 96 | 0 | PT2F | ELF只支持伪差分输出 |
| 97 | 0 | IO | 97 | 0 | PT2E | ELF只支持伪差分输出 |
| 98 | 0 | IO | 98 | 0 | PT2B | ELF只支持伪差分输出 |
| 99 | 0 | IO | 99 | 0 | PT2C | - |
| 100 | 0 | IO | 100 | 0 | PT2A | ELF只支持伪差分输出 |
IO BANK 0, 1
| Anlogic ELF650 LQFP100 | LATTICE LCMXO640 TQFP100 | |||||
|---|---|---|---|---|---|---|
| 引脚编号 | IO BANK | 引脚说明 | 引脚编号 | IO BANK | 引脚说明 | 差异备注 |
| 51 | 1 | IO,LVDSR0N | 51 | 1 | PR11D | XO差分对的PN端不在相邻位置 |
| 52 | 1 | IO,LVDSR0P | 52 | 1 | PR11B | XO差分对的PN端不在相邻位置 |
| 53 | 1 | IO,LVDSR1N | 53 | 1 | PR11C | XO差分对的PN端不在相邻位置 |
| 54 | 1 | IO,LVDSR1P | 54 | 1 | PR11A | XO差分对的PN端不在相邻位置 |
| 55 | 1 | IO,LVDSR2N | 55 | 1 | PR10D | - |
| 56 | 1 | IO,LVDSR2P | 56 | 1 | PR10C | - |
| 57 | 1 | IO,LVDSR3N | 57 | 1 | PR10B | - |
| 58 | 1 | IO,LVDSR3P | 58 | 1 | PR10A | - |
| 59 | 1 | IO,LVDSR4N | 59 | 1 | PR9D | XO不支持差分 |
| 60 | 1 | VCCIO1 | 60 | 1 | VCCIO1 | - |
| 61 | 1 | IO,LVDSR4P | 61 | 1 | PR9B | - |
| 62 | 1 | VSSIO | 62 | 1 | GNDIO | - |
| 63 | 1 | IO,LVDSR5N | 63 | 1 | PR7B | XO不支持差分 |
| 64 | 1 | IO,LVDSR5P | 64 | 1 | PR6C | XO不支持差分 |
| 65 | 1 | IO,GCLKP_2,LVDSR6N | 65 | 1 | PR6B | XO不支持差分，XO不是全局时钟输入引脚 |
| 66 | 1 | IO,GCLKP_3,LVDSR6P | 66 | 1 | PR5D | XO不支持差分，XO不是全局时钟输入引脚 |
| 67 | 1 | IO,LVDSR7N | 67 | 1 | PR5B | XO不支持差分 |
| 68 | 1 | IO,LVDSR7P | 68 | 1 | PR4D | XO不支持差分 |
| 69 | 1 | IO,LVDSR8N | 69 | 1 | PR4B | XO不支持差分 |
| 70 | 1 | IO,LVDSR8P | 70 | 1 | PR3D | XO不支持差分 |
| 71 | 1 | IO,LVDSR9N | 71 | 1 | PR3B | XO不支持差分 |
| 72 | 1 | IO,LVDSR9P | 72 | 1 | PR2D | XO不支持差分 |
| 73 | 1 | IO,LVDSR10N | 73 | 1 | PR2B | XO不支持差分 |
| 74 | 1 | VCCIO1 | 74 | 1 | VCCIO1 | - |
| 75 | 1 | VSSIO | 75 | 1 | GNDIO | - |
| 76 | 1 | IO,LVDSR10P | 76 | 0 | PT9F | - |
IO BANK 2
| Anlogic ELF650 LQFP100 | LATTICE LCMXO640 TQFP100 | |||||
|---|---|---|---|---|---|---|
| 引脚编号 | IO BANK | 引脚说明 | 引脚编号 | IO BANK | 引脚说明 | 差异备注 |
| 26 | 2 | IO,TMS | 26 | 2 | TMS | - |
| 27 | 2 | IO | 27 | 2 | PB2C | - |
| 28 | 2 | IO,TCK | 28 | 2 | TCK | - |
| 29 | 2 | IO,MISO | 29 | 2 | VCCIO2 | XO不支持MSPI加载方式 |
| 30 | 2 | IO,SPICSN | 30 | 2 | GND | XO不支持MSPI加载方式 |
| 31 | 2 | IO,TDO | 31 | 2 | TDO | - |
| 32 | 2 | IO,SCLK | 32 | 2 | PB4C | XO不支持MSPI加载方式 |
| 33 | 2 | IO,TDI | 33 | 2 | TDI | - |
| 34 | 2 | IO,MOSI | 34 | 2 | PB4E | XO不支持MSPI加载方式 |
| 35 | 2 | VCCEXT | 35 | - | VCC | - |
| 36 | 2 | IO,GCLK5 | 36 | 2 | PB5B | - |
| 37 | 2 | IO | 37 | 2 | PB5D | - |
| 38 | 2 | IO,GCLK4 | 38 | 2 | PB6B | - |
| 39 | 2 | IO | 39 | 2 | PB6C | - |
| 40 | 2 | GND | 40 | - | GND | - |
| 41 | 2 | VCCIO2 | 41 | 2 | VCCIO2 | - |
| 42 | 2 | VSSIO | 42 | 2 | GNDIO | - |
| 43 | 2 | IO | 43 | 2 | PB8B | - |
| 44 | 2 | IO,PROGRAMN | 44 | 2 | PB8C | ELF只支持伪差分输出，ELF该引脚必须外部上拉 |
| 45 | 2 | IO,SCL | 45 | 2 | PB8D | ELF只支持伪差分输出 |
| 46 | 2 | IO,SDA | 46 | 2 | PB9A | - |
| 47 | 2 | IO,INITN | 47 | 2 | PB9C | ELF只支持伪差分输出，ELF该引脚必须外部上拉 |
| 48 | 2 | IO,PWRDWN | 48 | - | SLEEPN | - |
| 49 | 2 | IO | 49 | 2 | PB9D | ELF只支持伪差分输出 |
| 50 | 2 | IO,DONE | 50 | 2 | PB9F | - |
IO BANK 3
| Anlogic ELF650 LQFP100 | LATTICE LCMXO640 TQFP100 | |||||
|---|---|---|---|---|---|---|
| 引脚编号 | IO BANK | 引脚说明 | 引脚编号 | IO BANK | 引脚说明 | 差异备注 |
| 1 | 3 | IO | 1 | 3 | PL2A | ELF只支持伪差分输出 |
| 2 | 3 | IO | 2 | 3 | PL2C | ELF只支持伪差分输出 |
| 3 | 3 | IO | 3 | 3 | PL2B | ELF只支持伪差分输出 |
| 4 | 3 | IO | 4 | 3 | PL2D | ELF只支持伪差分输出 |
| 5 | 3 | IO | 5 | 3 | PL3A | ELF只支持伪差分输出 |
| 6 | 3 | IO | 6 | 3 | PL3B | ELF只支持伪差分输出 |
| 7 | 3 | IO | 7 | 3 | PL3C | ELF只支持伪差分输出 |
| 8 | 3 | IO | 8 | 3 | PL3D | ELF只支持伪差分输出 |
| 9 | 3 | IO | 9 | 3 | PL4A | - |
| 10 | 3 | VCCIO3 | 10 | 3 | VCCIO3 | - |
| 11 | 3 | IO | 11 | 3 | PL4C | ELF只支持伪差分输出 |
| 12 | 3 | VSSIO | 12 | 3 | GNDIO | - |
| 13 | 3 | IO | 13 | 3 | PL4D | ELF只支持伪差分输出 |
| 14 | 3 | IO | 14 | 3 | PL5B | - |
| 15 | 3 | IO,GCLK7 | 15 | 3 | PL7B | ELF是全局时钟输入引脚 |
| 16 | 3 | IO | 16 | 3 | PL8C | ELF只支持伪差分输出 |
| 17 | 3 | IO | 17 | 3 | PL8D | ELF只支持伪差分输出 |
| 18 | 3 | IO | 18 | 3 | PL9A | - |
| 19 | 3 | IO | 19 | 3 | PL9C | - |
| 20 | 3 | IO | 20 | 3 | PL10A | - |
| 21 | 3 | IO | 21 | 3 | PL10C | - |
| 22 | 3 | IO | 22 | 3 | PL11A | - |
| 23 | 3 | IO | 23 | 3 | PL11C | - |
| 24 | 3 | VCCIO3 | 24 | 3 | VCCIO3 | - |
| 25 | 3 | VSSIO | 25 | 3 | GNDIO | - |